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NIKIOO 


TECHNICAL MANUAL 


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BDIDDID 



EK-VK100-TM-001 



NKIOO 

TECHNICAL MANUAL 



1st Edition, April 1982 



Copyright 1982 by Digital Equipment Corporation 
All Rights Reserved 



This document includes material from Microsoft 
Basic-80. Copyright e 1979 by Microsoft. All 
rights reserved. 

CBarco Model GD33 monitor is a registered 
trademark of the Barco Corporation. 

The reproduction of this material, in part or 
whole, is strictly prohibited. For copy 



Services 
orat ion , 



wnoie, J. s> SLi i^uiy ijiuiiiuilku. ci 

information, contact the Educational 
Department, Digital Equipment Corp 
Maynard, Massachusetts 01754. 

The information in this document is subject to 
change without notice. Digital Equipment 
Corporation assumes no responsibility for any 
errors that may appear in this document. 



Printed in U.S.A. 



The following are trademarks of Digital Equipment 
Corporation, Maynard, Massachusetts. 

DEC 

DECUS 

DIGITAL 

Digital Logo 

PDP 

UNIBUS 

VAX 



DECnet 




OMNIBUS 


DECsystem- 


-10 


OS/8 


DECSYSTEM- 


-20 


PDT 


DECwriter 




RSTS 


DIBOL 




RSX 


EduSystem 




VMS 


IAS 




VT 


MASSBUS 







4/82-14 



CONTENTS 



CHAPTER 1 


1. 


1 






1. 


2 






1. 


3 






1. 


3. 


1 




1. 


3. 


2 




1. 


3. 


3 




1. 


4 






1. 


4. 


1 




1. 


4. 


2 




CHAPTER 2 


2. 


1 






2. 


2 






2. 


3 






2. 


,4 






2. 


5 






2. 


,5. 


,1 




2. 


,5. 


,2 




2. 


,5. 


,3 




2. 


,5. 


,3. 


1 


2. 


.5. 


.3. 


2 


2. 


.5. 


,3. 


3 


2, 


.6 






2. 


.6. 


,1 




2. 


.6, 


.1. 


,1 


2, 


.6, 


.1. 


,2 


2, 


.6, 


.2 




2, 


.6, 


.2. 


.1 


2 


.6, 


.2. 


.2 


2, 


.6, 


.2. 


,3 


2 


.6, 


.3 




2 


.6, 


.3. 


,1 


2 


.6, 


.3. 


.2 



INTRODUCTION 

Introduction 1-1 

General Description 1-1 

Accessories and Supplies 1-5 

VK100 Carrying Cases 1-5 

Keyboard Overlays 1-5 

VK100 Cables and Connectors 1-5 

Ordering Accessories and Supplies 1-6 

Toll-Free Telephone Orders 1-6 

Direct Mail Orders 1-6 

INSTALLATION 

Introduction 2-1 

Site Considerations 2-1 

Unpacking and Inspection 2-2 

Repacking 2-4 

Installation 2-5 

Connecting to the Barco Model GD33 Monitor ... 2-11 
Connecting to a Typical Black and 

White Monitor 2-13 

Connecting to the LA34VA Graphics Printer .... 2-13 
Connecting Directly to the LA34VA 

Graphics Printer 2-15 

Adding a Terminal from a Multiterminal 

String 2-16 

Removing a Terminal from a Multiterminal 

String 2-18 

Hardware Interface Information 2-19 

General Communications Interface Information . 2-19 

Baud Rate 2-19 

Character Format 2-19 

EIA Interface 2-19 

Physical Interface 2-19 

Electrical Characteristics 2-21 

EIA Interface Cables 2-22 

20 mA Current Loop Interface 2-22 

Electrical Characteristics 2-23 

20 mA Interface Cables 2-23 



in 



2. 


6. 


4 


2. 


6. 


5 


2. 


6. 


5.1 


2. 


6. 


5.2 


2. 


6. 


5.3 


2. 


6. 


5.4 


2. 


6. 


5.5 


2. 


6. 


6 


2. 


6. 


6.1 


2. 


6. 


6.2 


2. 


6. 


6.3 


2. 


6. 


6.4 


CHAPTER 3 


3. 


1 




3. 


2 




3. 


3 




3. 


3. 


.1 


3. 


3. 


2 


3. 


3. 


,3 


3. 


.3. 


.4 


3. 


,4 




3. 


,4. 


,1 


3. 


,4. 


,2 


3. 


,5 




3. 


.5. 


,1 


3. 


,5. 


,2 


3. 


,5. 


.3 


3. 


,6 




3, 


,6. 


.1 


3. 


.6. 


.2 


3. 


,6. 


.3 


3. 


.6. 


,4 


3. 


,6. 


.5 


3, 


.6. 


.6 


3, 


.6. 


.7 


3, 


.6, 


.8 


3 


.6. 


.9 


3 


.6 


.10 


3 


.6 


.11 


3 


.6 


.12 


3 


.6 


.13 


3 


.6 


.14 


3 


.6 


.15 


3 


.6 


.16 


3 


.6 


.17 


3 


.6 


.18 


3 


.6 


.19 


3 


.6 


.20 


3 


.6 


.21 


3 


.6 


.22 


3 


.6 


.23 



Buffer Overflow 2-23 

Display Interface 2-26 

Composite Video Port 2-26 

Color Monitor Port 2-27 

Composite Sync Waveform Timing 2-27 

Monitor Selection 2-28 

Video Interface Cables 2-28 

Hardcopy Interface 2-29 

Physical Interface 2-29 

Electrical Interface 2-30 

Hardcopy Interface Cables 2-30 

Hardcopy Device Sharing 2-30 

OPERATING INFORMATION 

Introduction 3-1 

Terminal Controls 3-1 

Keyboard Controls 3-2 

Standard Keys 3-2 

Special Function Keys 3-2 

SET-UP Mode Keys 3-7 

Locator Mode Keys 3-9 

Visual and Audible Indicators 3-10 

Visual Indicators 3-10 

Audible Indicators 3-12 

SET-UP Mode Description 3-12 

Set-Up Parameter Summary 3-12 

Changing a SET-UP Parameter (Operator) 3-19 

Changing a SET-UP Parameter (Host Computer) .. 3-20 

SET-UP Parameter Descriptions 3-20 

Transmit Speed (TS) 3-21 

Receive Speed (RS) 3-21 

Line/Local (LL) 3-21 

Basic (BA) 3-21 

Parity Enable (PE) 3-22 

XON/XOFF (XO) 3-22 

Scroll Mode (SM) 3-23 

Reverse Video (RV) 3-24 

Horizontal Margins (HM) 3-24 

Vertical Margins (VM) 3-24 

Expansion Mode (EM) 3-24 

Horizontal Position (HP) 3-25 

Overstrike (OS) 3-25 

Visual Cursor (VC) 3-25 

Text Display (TD) 3-25 

Graphics Display (CD) 3-26 

Graphics Prefix (GP) 3-26 

Single Character (SC) 3-27 

Local Echo (LE) 3-27 

New Line (NL) 3-27 

Auto Hardcopy (AH) 3-27 

Auto Wraparound (AW) •• 3-27 

Key Repeat (KR) 3-28 



IV 



3. 


6. 


24 




3. 


6. 


25 




3. 


6. 


26 




3. 


6. 


27 




3. 


6. 


28 




3. 


6. 


29 




3. 


6. 


30 




3. 


6. 


31 




3. 


6. 


32 




3. 


6. 


33 




3. 


6. 


34 




3. 


6. 


35 




3. 


6. 


36 




CHAPTER 4 


4. 


.1 






4. 


.2 






4. 


.2. 


,1 




4. 


.2. 


.2 




4. 


.2. 


.3 




4. 


.2. 


.4 




4. 


.3 






4. 


.4 






4. 


.4. 


,1 




4. 


.4. 


,1. 


1 


4. 


,4. 


,1. 


2 


4, 


.4. 


.1. 


3 


4, 


.4. 


.1. 


4 


4, 


.4. 


.1. 


5 


4, 


.4. 


.1. 


6 


4, 


.4, 


.1. 


7 


4, 


.4, 


.1. 


8 


4, 


.4, 


.1. 


9 


4, 


.4. 


.1. 


10 


4, 


.4, 


.1. 


11 


4, 


.4. 


,1. 


12 


4. 


.4. 


.2 




4, 


.4, 


.3 




4, 


.4. 


.4 




4, 


.4, 


.4. 


1 


4 


.4, 


.4. 


2 


CHAPTER 5 


5 


.1 






5 


.2 






5 


.2. 


.1 




5 


.2 


.1. 


1 


5 


.2 


.1. 


2 


5 


.2 


.1. 


3 


5 


.2 


.1. 


4 


5 


.2 


.1. 


5 



Keyclick (KC) 3-28 

Margin Bell (MB) 3-28 

Terminal Mode (TM) 3-28 

Keypad Mode (KP) 3-28 

Cursor Key Mode (CK) 3-28 

Programmed Keypad Mode (PK) 3-29 

Tablet Locator Mode (TL) 3-29 

United Kingdom Character Set (UK) 3-29 

Communications Interface (CI) 3-29 

Hardcopy Speed (HS) 3-29 

Power Frequency (PF) 3-30 

Interlace (IL) 3-30 

Self-Test (ST) 3-30 

PROGRAMMING SUMMARY 

Introduction 4-1 

Keyboard Codes 4-1 

Standard Key Codes 4-1 

Cursor Control Key Codes 4-1 

Auxiliary Keypad Codes 4-3 

Control Characters 4-4 

Character Sets 4-6 

Control Functions 4-8 

ANSI Control Functions Summary 4-9 

Cursor Movement Commands 4-9 

Character Attributes 4-10 

Erasing Commands 4-10 

Programmable LEDs 4-10 

Select Character Sets (SCS) 4-11 

Enter Graphics Mode 4-11 

Modes 4-11 

Reports 4-12 

Reset 4-12 

Print Commands 4-12 

Confidence Tests 4-12 

Device Control Strings 4-13 

VT52 Control Functions Summary 4-13 

ReGIS Summary 4-13 

Basic Summary 4-19 

Commands/Statements 4-19 

Functions 4-19 

THEORY OF OPERATION 

Introduction 5-1 

Terminal Controller Module 5-2 

Central Processing Unit (CPU) 5-2 

Address 5-7 

ROMs 5-10 

RAMs 5-10 

Data Bus 5-12 

Control Functions 5-12 



Memory Refresh Cycle 5-16 

Interrupts 5-16 

CRT Sweep Overview 5-17 

Vector Generation Overview 5-18 

Addressing the Screen RAM 5-22 

Modification of Data in the Screen RAM ... 5-26 

Refresh the CRT 5-29 

Modify Screen ROM and CRT Refresh Timing . 5-31 

Generation of Vectors 5-33 

Writing a Character on the Screen 5-35 

Arbitrary Vectors 5-37 

I/O Port Overview 5-42 

Communication Interface (8251A) 5-43 

Baud Rate Generator 5-51 

Selection of I/O Port 5-52 

Transferring Data Through the I/O Port ... 5-52 

Hardcopy Overview 5-58 

Keyboard 5-65 

Power Supply 5-68 

TESTING AND TROUBLESHOOTING 

Introduction 6-1 

Automatic Tests (PUPTST) 6-1 

Escape Sequences (CSITST) 6-1 

SET-UP Mode (SETST) 6-2 

Error Reporting 6-2 

Fatal Errors (TST ERROR) 6-2 

Non-Fatal Errors 6-3 

Power-Up Self-Test 6-3 

8085 CPU Test (CPUTST) 6-4 

Visual and Audible Indicators 6-4 

ROM Test (ROM Test) 6-4 

Program RAM Test (RAMTST) 6-5 

Video Bit Map RAM Test (VBMTST) 6-5 

Vector Generator Test (VGNTST) 6-6 

CRT Controller Test (CRTST) 6-8 

CRT Timing 6-8 

Diagnostic Tests 6-8 

External Communications Test 6-8 

Hardcopy Communications Test 6-9 

Display Test 6-10 

Color Bar Test 6-10 

Screen Alignment Pattern 6-11 

Error Codes 6-11 

Troubleshooting 6-16 

Adjustments 6-24 

Removal and Replacement 6-24 

Top Cover Removal 6-25 

Keyboard Assembly Removal 6-26 

Power Supply Assembly Removal 6-27 

Power Supply Regulator Board Removal 6-28 

Power Supply Fan Assembly Removal 6-29 

6.7.6 Terminal Logic Board Removal 6-30 

vi 



5. 


2.1.6 


5. 


2.1.7 


5. 


2.1.8 


5. 


2.2 


5. 


2.2.1 


5. 


2.2.2 


5. 


2.2.3 


5. 


2.2.4 


5. 


2.2.5 


5. 


2.2.6 


5. 


2.2.7 


5. 


2.3 


5. 


2.3.1 


5. 


2.3.2 


5. 


2.3.3 


5. 


2.3.4 


5. 


2.3.5 


5. 


2.4 


5. 


2.5 


CHAPTER 6 


6. 


1 


6. 


.1.1 


6. 


,1.2 


6. 


,1.3 


6. 


,1.4 


6. 


.1.4.1 


6. 


,1.4.2 


6, 


.2 


6, 


.2.1 


6. 


.2.2 


6. 


.2.3 


6 


.2.4 


6 


.2.5 


6 


.2.6 


6 


.2.7 


6 


.2.8 


6 


.3 


6 


.3.1 


6 


.3.2 


6 


.3.3 


6 


.3.4 


6 


.3.5 


6 


.4 


6 


.5 


6 


.6 


6 


.7 


6 


.7.1 


6 


.7.2 


6 


.7.3 


6 


.7.4 


6 


.7.5 



AP 


PENDIX A 


APPENDIX B 


FIGURES 


1- 


•1 


1- 


2 


1- 


■3 


2- 


•1 


2- 


■2 


2- 


■3 


2- 


-4 


2- 


-5 


2- 


-6 


2- 


-7 


2- 


-8 


2- 


-9 


2- 


-10 


2- 


-11 


2- 


-12 


3- 


-1 


3- 


-2 


3- 


-3 


3- 


-4 


3- 


-5 


3- 


-6 


4- 


-1 


4- 


-2 


5- 


-1 


5- 


-2 


5- 


-3 


5- 


-4 


5- 


-5 


5- 


-6 


5- 


-7 


5- 


-8 


5- 


-9 


5- 


-10 


5- 


-11 


5- 


-12 


5- 


-13 


5- 


-14 


5- 


-15 


5- 


-16 


5- 


-17 


5- 


-18 


5- 


-19 


5- 


-20 


5- 


-21 


5- 


-22 


5- 


-23 



VK100 TERMINAL SPECIFICATIONS 
CALCULATION 



Text Mode Operation 1-2 

Graphics Mode Operation 1-3 

BASIC Mode Operation 1-4 

VK100 (GIGI) Terminal Dimensions 2-1 

VK100 (GIGI) Terminal Shipping Container 2-3 

VK100 (GIGI) Terminal Switch and Cable 

Locations 2-4 

Default SET-UP Switch Pack Location 2-5 

Default SET-UP Switch Pack Setting 2-6 

EIA Communications Cable Connector 2-9 

BARCO Model GD33 Monitor Connections 2-12 

Multiterminal String with Terminal Turned Off ... 2-14 
Single VK100 (GIGI) Terminal to LA34VA 

Graphics Printer Selection 2-15 

LA34VA Graphics Printer (Rear View) 2-15 

Adding a Terminal to a Multiterminal String 2-16 

Removing a Terminal from a Multiterminal String . 2-18 

Terminal Controls 3-1 

Standard Keys 3-3 

Special Function Keys 3-4 

SET-UP Mode Keys 3-7 

Locator Keys 3-9 

Keyboard Indicators 3-11 

Keyboard-Generated ASCII Codes 4-2 

Keyboard-Generated Control Codes 4-4 

VK100 (GIGI) Block Diagram 5-1 

System Overview Block Diagram 5-3 

CPU Functional Block Diagram 5-4 

Basic CPU Block Diagram 5-5 

Instruction Cycle to Store Accumulator Direct ... 5-6 

Opcode Fetch Machine Cycle 5-7 

CPU to RAM Memory Block Diagram 5-11 

8202 Block Diagram and Pin Description 5-13 

DATA BUS 5-14 

Interrupt Block Diagram 5-16 

Vector Generator Block Diagram 5-20 

System Timing 5-21 

Basic Overview of Address and Data Path 5-23 

Screen Update Screen RAM Address Breakdown 5-23 

Modify Data, Screen RAM Address Breakdown 5-24 

Addressing the Screen RAM 5-25 

Translation of X Bits 5-27 

Modify Data Bit 5-28 

Color Control 5-30 

Screen RAM Data Timing 5-32 

Time State Generator 5-32 

Basic Vectors 5-32 

Arbitrary Vector Timing 5-38 



vn 



5-24 Carry Control 5-39 

5-25 Direction Control 5-41 

5-26 Basic I/O Port Block Diagram 5-42 

5-27 8251-A Block Diagram 5-44 

5-28 Mode Register 5-44 

5-29 Transmit/Receive Format Asychronous Mode 5-45 

5-30 Command Instruction Format 5-47 

5-31 Status Register 5-47 

5-32 Baud Rate Generator 5-51 

5-33 Port Selection Block Diagram 5-53 

5-34 20 mA Transmit Loop 5-55 

5-35 20 mA Receive Loop 5-55 

5-36 EIA Transmit 5-56 

5-37 EIA Receive 5-57 

5-38 Line Printer Connected to Single Terminal 5-59 

5-39 Printer Connection to Multiple Terminals 

and Connector Names 5-60 

5-40 Logic for Hardcopy Bus Control 5-61 

5-41 Hardcopy Data Transfer 5-64 

5-42 Keyboard Matrix 5-66 

5-43 Keyboard Read with "A" Switch Pressed 5-67 

5-44 LED (Indicator) Keyclicks and Bleeper Block 

Diagram 5-68 

5-45 Power Supply Schematic 5-70 

6-1 Vector Generator Test Sequence 6-1 

6-2 Module Removal Sequence 6-24 

6-3 VK100 Terminal (Bottom View) 6-25 

6-4 Keyboard Assembly Removal 6-26 

6-5 VK100 Terminal (Rear View) 6-27 

6-6 Power Supply Assembly Removal 6-27 

6-7 Power Supply Fan Assembly Removal 6-29 

6-8 Terminal Logic Board Removal 6-30 

B-l Calculations B-l 



vnx 



TABLES 

1-1 VK100 Cables and Connectors 1-6 

1-2 Related DIGITAL Documentation 1-8 

2-1 EIA Connector Signals 2-20 

2-2 EIA Interface Cables 2-22 

2-3 20 mA Current Loop Specifications 2-22 

2-4 20 mA Interface Cables 2-23 

2-5 Terminal Receive Speed Limits 2-25 

2-6 Fill Character Requirements 2-25 

2-7 Video Interface Cables 2-29 

2-8 Hardcopy Interface Pin Assignments 2-29 

2-9 Hardcopy Interface Cables 2-31 

3-1 SET-UP Parameter Summary 3-14 

4-1 Cursor Control Key Codes 4-2 

4-2 Auxiliary Keypad Numeric Key Codes 4-3 

4-3 Auxiliary Keypad PF Key Codes 4-3 

4-4 Terminal-Supported Control Character Function ... 4-5 

4-5 Select Character Set Sequence 4-6 

5-1 Machine Cycle Status and Control 5-5 

5-2 8202 Pin Description 5-8 

5-3 I/O Register Addresses 5-14 

5-4 Program RAM Addresses 5-15 

5-5 I/O RAM Microcode Address 5-15 

5-6 Interrupt Priority, Restart Address, and 

Sensitivity 5-17 

5-7 Screen RAM Write ' Control 5-29 

5-8 Addressing the 8251A 5-50 

5-9 Baud Rate Selection 5-52 

5-10 I/O Port Selection 5-53 

5-11 Interface Specifications 5-56 

6-1 Possible Error Codes 6-2 

6-2 Possible Fatal Error Codes 6-12 

6-3 Possible Nonfatal Error Codes 6-13 

6-4 Fatal Error Codes 6-16 

6-5 Nonfatal Error Codes 6-17 

6-6 VK100 Troubleshooting 6-18 

6-7 On-Site Recommended Spares 6-22 

6-8 DIGITAL Servicenter Recommended Spares ..; 6-23 



IX 



CHAPTER 1 
INTRODUCTION 



1.1 INTRODUCTION 

The VK100 terminal is an interactive graphics terminal designed 
for use with a user supplied monitor. The terminal can operate in 
either an on-line or off-line mode and can execute programs 
written in GIGI BASIC. 

This chapter provides a general overview of the VK100 terminal. 
The following chapters describe and summarize installation, 
operation, programming characteristics, theory of operation, and 
maintenance procedures for the VK100 terminal. 

1.2 GENERAL DESCRIPTION 

The VK100 or GIGI (General Imaging Generator and Interpreter) is 
designed as a terminal subsystem that connects to a host computer. 
The VK100 provides local (in terminal) processing using a 
microprocessor. The microprocessor supports two interpreters; a 
ReGIS graphics interpreter and the GIGI BASIC language 
interpreter. ReGIS (Remote Graphics Instruction Set) is a graphics 
language; GIGI BASIC is a BASIC language that uses VK100 unique 
graphics capabilities. 

The VK100 is a separate keyboard which requires a user-supplied 
monitor for displaying screen images. Either black and white or 
color (RGB) monitors can be used. Also, the VK100 can display 
images on an optional LA34VA Graphics Printer which attaches 
directly to the terminal. 

The VK100 can be used as a text terminal and as a graphics 
terminal. The VK100 terminal's basic mode of operation is as a 
text terminal. In this mode the terminal acts as a translator 
between the operator and the host computer. When the operator 
types a message or command on the keyboard, the terminal sends it 
immediately to the host computer. The host computer receives the 
message or command and executes it. Then the host computer sends 
an acknowledgement to the terminal, indicating the message or 
command was received and executed. The terminal receives the 
acknowledgement and displays it on the monitor screen. Figure 1-1 
shows a simple diagram of the VK100 terminal operating in text 
mode. 



1-1 



USER SUPPLIED 
MONITOR 



BLACK & WHITE 

OR 

COLOR VIDEO OUTPUT 




Figure 1-1 Text Mode Operation 



The VK100 terminal always enters text mode when powered on or 
reset. 

The VK100 (GIGI) terminal's primary operating mode is as a 
graphics terminal. The name GIGI derives from this capability as a 
General Imaging Generator and Interpreter. 

Generally, the host computer places the terminal in graphics mode. 
In this mode the terminal interprets all data received from the 
host computer or the terminal keyboard as graphics commands and 
data. The interpreter and image generator translates the commands 
and data into the images displayed on the monitor screen. Figure 
1-2 shows a simple diagram of the VK100 terminal operating in 
graphics mode. 

The commands to the interpreter come from a new graphics command 
set called ReGIS (Remote Graphics Instruction Set) . ReGIS command 
set consists of a few simple instructions and options. 

Within the graphics mode is a locator mode. This mode helps the 
operator locate a point on the screen and report that point to the 
host computer. The VK100 terminal enters locator mode through the 
keyboard or a command from the host computer. When the terminal 
enters locator mode, a large cross-hair cursor appears ont he 
screen. The point where the two lines cross is the point reported 
to the host computer. 



1-2 



USER SUPPLIED 
MONITOR 



BLACK & WHITE 

OR 

.COLOR VIDEO OUTPUT 




Figure 1-2 Graphics Mode Operation 



The operator can return the terminal to the text mode at any time. 
When in text mode, the terminal interprets all graphics data and 
commands as text characters only and not as graphics. 

The VK100 terminal also contains a BASIC language interpreter. 
This interpreter allows the terminal to run BASIC language 
programs. The terminal enters BASIC mode through the SET-UP mode 
(described in Chapter 3) or a command from the host computer. 

The BASIC program comes from one of two places, the keyboard or 
the host computer. The operator selects the program source with a 
SET-UP parameter. If the keyboard is the program source, the 
operator types the BASIC program directly into the terminal 
memory. When the program runs, the output normally goes to the 
monitor screen. If the host computer is the program source, the 
program loads into the terminal memory from the host computer. 
When the program runs, the output normally returns to the host 
computer. Figure 1-3 shows a simple diagram of the VK100 terminal 
operating in both cases. 

When the terminal enters the BASIC mode, the BASIC indicator above 
the keyboard lights. The operator can return the terminal to text 
mode at any time, either through the keyboard or the SET-UP mode. 
When the terminal is in text mode, it interprets all data as text 
only and not as BASIC language commands. 



1-3 



KEYBOARD 



USER SUPPLIED 
MONITOR 



BLACK & WHITE 

OR 

COLOR VIDEO OUTPUT 



BASIC 
-• INTERPRETER 
& MEMORY 



RECEIVER 



TRANSMITTER 



GIGI TERMINAL 



KEYBOARD AS THE BASIC PROGRAM SOURCE 



-* >- 



-I L- 



COMMUNICATIONS 

LINES 

(20 mA OR EIAI 



HOST 
COMPUTER 











USER SUPPLIED 
MONITOR 

























HOST 
COMPUTER 






BASIC 

INTERPRETER 
& MEMORY 




RECEIVER 














TRANSMITTER 


KEYBOARD 






COMMUNICATIONS 
LINES 






GIGITER 


MINAL 








(20 mA OR EIA) 


HOST COMPUTER AS THE BASIC PROGRAM SOURCE 


MA 6769 



Figure 1-3 BASIC Mode Operation 



1-4 



The VK100 terminal hardware is contained in a light weight plastic 
case. The terminal contains three major assemblies; the keyboard, 
the processor board, and the power supply, a color or monochrome 
(black and white) monitor is supplied by the customer. 

1.3 ACCESSORIES AND SUPPLIES 

DIGITAL offers the following accessories and supplies for the 

VK100 terminal. 

1.3.1 VK100 (GIGI) Carrying Cases (VK10K-CA) 

These cases are specially designed to hold the VK100 terminal and 
all associated cables. They are constructed of high-density, 
charcoal brown, textured plastic and include two chrome-plated 
latches with locks. 

1.3.2 VK100 Keyboard Overlays 

Two types of overlays are available with the VK100 terminal: 
preprinted keypad and keypad overlays. These overlays are 
easy-to-install , plastic key covers representing the VK100 
terminal's special function keys or user-defined character sets. 

Keypad overlays cover VK100's auxiliary keypad and are used with 
the following software packages. 

CAI Primer (VK10K-AA) 

Graphics Editor (VK10K-AB) 

ReGIS Illustrated Text Editor (VK10K-AC) 

Character Set Editor (VK10K-AD) 

Keyboard overlays cover the VK100 terminal's entire keyboard, 
including the auxiliary keypad, and include the following. 

Preprinted APL character set overlays (VK10K-BB) Blank, full 
keyboard overlays for user-defined character sets (VK10K-BA) 

1.3.3 VK100 Cables and Connectors 

Table 1-1 describes the cables and connectors used by the VK100 
terminal . 

In the future, additional options will be available. Contact the 
nearest DIGITAL Sales Office for further information. 



1-5 



Table 1-1 VK100 Cables and Connectors 



Cable Description 



BC26M-05 RGB cable with BNC connectors for user-supplied 

monitor 

BC26B-01 Y-cable for daisy-chaining the LA34VA graphics 

printer to multiple VK100 terminals 

P/N 7015503-00 20 mA loopback connector 

P/N 1215336-00 EIA loopback connector 

BC22B-25 EIA extension to second VK100 terminal from 

Y-cable (BC26B-01) 

BC05F-15 20 mA cable with Mate-N-Lok connectors for 

or connecting VK100 terminal (with 20 mA option) 

BC05F-50,A0 directly, to a line unit 

BC22A-10 EIA null modem; connects VK100 terminal 

or directly to a line unit (6 conductor 

BC22A-25 cable) 

BC22B-10 EIA extension to modem (14 conductor cable) 

or 

BC22B-25 



RELATED DOCUMENTATION 

Table 1-2 lists the related documentation that is available from 
DIGITAL'S Accessory and Supplies Group. For specific ordering 
information, see the end of this chapter. 

1.4 ORDERING ACCESSORIES AND SUPPLIES 

You can order accessories and supplies (including documentation) 

either by mail or phone. 

1.4.1 Toil-Free Telephone Orders 

Call DIGITAL Direct Catalog Sales from 8:30 a.m. to 5:00 p.m. at 

one of the following numbers. 

Continental United States 
1-800-258-1710 

New Hampshire, Alaska, and Hawaii 
1-603-884-6660 



1-6 



Canada 
1-800-267-6146 

Northern California 
1-408-984-0200 

Chicago 
1-312-640-5612 

Outside North America 

contact your local A & SG business representative or local 

DIGITAL sales office. 

The following information applies to all telephone orders. 

Minimum order is $35 unless charged to Master Card, Visa, or 
American Express. 

Maximum order is $5,000. 

Phone orders are accepted at current list price only. 

Phone orders are accepted per DIGITAL standard terms and 
conditions only. 

1.4.2 Direct Mail Orders 

Mail all purchase orders directly to one of the following 

addresses . 

For U.S. Customers 

Digital Equipment Corporation 

ATT: A&SG 

P.O. Box CS2008 

Nashua, New Hampshire 03061 

For International Customers 
Digital Equipment Customers 
A&SG Business Manager 
c/o DIGITAL'S local subsidiary 

The following information applies to all direct mail orders. 

Minimum order is $35 unless paid by check, money order, or 
credit card (Visa, Master Card, or American Express accepted). 
No maximum order value. 



1-7 



Table 1-2 Related DIGITAL Documentation 



Title 



Document No, 



Description 



GIGI Terminal 
Installation and 
Owner's Manual 



EK-VK100-IN 



This manual describes the 
VK100 (GIGI) terminal. It 
provides information on 
installing the terminal and 
connecting the optional 
peripheral devices, 
performing terminal SET-UP, 
proper terminal operating 
specifications, and repair 
procedures. It also 
provides full 
specifications for all 
terminal outputs. A copy of 
this manual is shipped with 
each VK100 terminal. 



GIGI Programming 
Reference Card 



EK-0GIGI-RC 



This pocket size reference 
card summarizes the 
programmable features of 
the VK100 (GIGI) terminal. 
It includes a summary of 
both the ReGIS and BASIC 
command sets. A copy is 
shipped with each VK100 
terminal . 



GIGI Terminal 
SET-UP Reference 
Card 



EK-VK100-RC 



This pocket size reference 
card summarizes the VK100 
(GIGI) terminal SET-UP 
parameters. The card also 
contains the default SET-UP 
switch pack settings. A 
copy is shipped with each 
terminal . 



VK100 Pocket 
Service Guide 



EK-VK100-PS 



This manual is a 
module-level repair manual. 
It provides troubleshooting 
information, testing 
information, and removal 
and replacement information 
for the VK100 terminal. 



1-8 



Table 1-2 Related DIGITAL Documentation (Cont) 



Title 



Document No, 



Description 



VK100 Technical 
Manual 



EK-VK100-TM 



VK100 Illustrated 
Parts Breakdown 
(IPB) 



EK-VK100-IP 



VK100 Print Set 



MP-00893-00 



GIGI/ReGIS 
Handbook 



AA-K336A-TK 



This manual provides a 
detailed block-diagram- 
level discussion of the 
VK100 terminal. It also 
provides information on 
troubleshooting the 
terminal. The manual does 
not contain a set of 
schematic drawings. These 
drawings are a part of the 
VK100 print set, which must 
be ordered separately. 

This manual provides a 
detailed parts breakdown of 
the terminal. It does not 
provide part numbers for 
printed circuit board 
components. That 
information is contained in 
the VK100 print set, which 
must be ordered separately. 

This document provides a 
complete set of electrical 
and mechanical schematic 
diagrams for the VK100 
terminal . 

This book provides user 
information to program the 
VK100 (GIGI) terminal, 
including system-dependent 
information. It provides 
comprehensive descriptions 
of ReGIS commands, 
organized alphabetically 
for easy reference. 
Extensive examples of the 
VK100 graphics 
capabilities are used 
throughout. A copy of this 
book is shipped with each 
VK100 terminal. 



1-9 



Table 1-2 Related DIGITAL Documentation (Cont) 



Title 



Document No. 



Description 



GIGI BASIC 
Manual 



AA-K335A-TK 



GIGI Graphics 
Editor Manual 



AA-J942A-TK 



GIGI Data Plotting 
Package Manual 



AA-J956A-TK 



GIGI Slide 
Projector Manual 



AA-J943A-TK 



This is a BASIC language 
manual for the VK100 
terminal. It provides 
comprehensive descriptions 
of the GIGI BASIC commands 
and functions, organized 
alphabetically for easy 
reference. A copy of this 
manual is shipped with each 
VK100 terminal. 

This manual describes the 
Graphics Editor software 
package within the entire 
VK100 package. The manual 
also includes descriptions 
of each Graphics Editor 
command. A copy of this 
manual is shipped with the 
GIGI Graphics Editor 
software package. 

This manual describes the 
GIGI Data Plotting software 
package: the functional 
modes, the steps to create 
a table, defining and 
displaying plots from that 
table, and performing 
statistical analysis. It 
also describes each of the 
plot commands and file 
structures for the table 
data and statistical 
results. A copy of this 
manual is shipped with the 
GIGI Data Plotting software 
package. 

This manual describes the 
GIGI Slide Projector 
software package. It 
describes the file formats 
and the use of the 
automatic and manual modes. 
It also describes each 
command and provides syntax 
and usage information. A 



1-10 



Table 1-2 Related DIGITAL Documentation (Cont) 



Title 



Document No, 



Description 



GIGI Character Set 
Editor User Guide 



AA-K337A-TK 



GIGI ReGIS 
Illustrated 
Technical 
Manual 



AA-J944A-TK 



GIGI/ReGIS CAI 
Primers Student 
Guide 



SDC AA-K329A-TE 



VAX/VMS GIGI/ReGIS 
CAI Primers 



SDC BE-K391A-BC 

(TU58) 

SDC AS-K327A-BE 

(Floppy) 



copy of this manual is 
shipped with the GIGI Slide 
Projector software package. 

This manual describes the 
GIGI Character Set Editor. 
It describes each command 
and provides syntax and 
usage information. A copy 
of this manual is shipped 
with the GIGI Character Set 
Editor software package. 



This manual desc 
GIGI ReGIS Illus 
Technical Manual 
package. It desc 
ReGIS Illustrate 
Manual its editi 
graphics capabil 
the use of pictu 
It also describe 

keypad commands, 
this manual is s 
the GIGI ReGIS I 
Technical Manual 
package. 



ribes the 
trated 

software 
ribes the 
d Technical 
ng and 
ities, and 
re files, 
s the 

A copy of 
hipped with 
llustrated 

software 



This manual is used with 
any of the GIGI/ReGIS CAI 
Primers. It provides an 
overall introduction to the 
primers, including their 
objectives and recommended 
course of study. It also 
tells new users how to 
start the course. 

This computer-assisted 
instruction (CAI) course 
runs on VAX/VMS. It helps 
new VK100 users to begin 
using the terminal and 
ReGIS. 



1-11 



Table 1-2 Related DIGITAL Documentation (Cont) 



Title 



Document No. 



Description 



VAX/VMS GIGI/ReGIS 
CAI Primers Course 
Administrator Guide 



SDC AA-K328A-TE 



This manual provides an 
overview of the course 
administrator's role and 
describes how to install 
and maintain the CAI 
software on VAX/VMS. 



RSTS/E GIGI/ReGIS 
CAI Primers 



SDC BC-K346A-BC 

(RL02) 

SDC AP-K392A-BC 

(Magtape 

9-track 800 

bits/in) 



This computer-assisted 
instruction (CAI) course 
runs on RSTS/E. It helps 
new VK100 users to begin 
using the terminal and 
ReGIS. 



SDC BB-K393A-BC 
(Magtape 9-track 
1600 bits/in) 



RSTS/E GIGI/ReGIS 
CAI Primers Course 
Administrator 
Guide 



SDC AA-K347A-TC 



This manual provides an 
overview of the course 
administrator's role and 
describes how to install 
and maintain the CAI 
software on RSTS/E. 



1-12 



CHAPTER 2 
INSTALLATION 



2.1 INTRODUCTION 

This chapter contains the following information. 

Site considerations 

Unpacking and inspection 

Repacking 

Installation 

Interface information 

Included in the interface information are special programming 
considerations to observe for effective use of the interface. 

2.2 SITE CONSIDERATIONS 

The VK100 terminal is a lightweight, single-piece unit that fits 
on a desk or tabletop. Figure 2-1 shows the dimensions of the 
terminal . 




Figure 2-1 VK100 (GIGI) Terminal Dimensions 



2-1 



The VK100 terminal usually connects to a user-supplied monitor 
(display) device. The monitor always operates with the terminal 
and should be located close to the terminal. Be sure to consider 
the monitor's size and weight when planning the terminal's 
location. 

The VK100 terminal places few limits on the operating environment. 
Avoid areas that have extremes in temperature and humidity or are 
subject to high levels of industrial contaminates. Appendix A 
describes the guaranteed operating conditions and terminal 
specifications. 

A small fan in the VK100 terminal cools the terminal's electronic 
components. Keep all ventilation slots and an area of about six 
inches around the terminal clear. Do not place papers or similar 
materials on top of or under the terminal. 

The terminal controls and cable connections are on the rear of the 
terminal. When installing the terminal, allow an adequate area to 
access the rear of the terminal. 

NOTE 
When installing the terminal, keep all 
power and signal cables free from 
obstructions, sharp bends, and stress. 

2.3 UNPACKING AND INSPECTION 

The VK100 terminal is packed in a reinforced shipping carton. The 
carton contains the following items. 

VK100 terminal 

VK100 terminal power cord 

VK100 terminal video cable 

GIGI Terminal Installation and Owner's Manual 

GIGI/ReGIS Handbook 

GIGI BASIC Manual 

GIGI Terminal SET-UP Reference Card 

GIGI Programming Reference Card 

GIGI Installation Card 

Figure 2-2 shows the packaging used with the VK100 terminal. Use 
the following procedure to unpack the terminal from the shipping 
carton. 



2-2 




Figure 2-2 VK100 (GIGI) Terminal Shipping Container 



1. Carefully cut the shipping tape and open the shipping 
carton by pulling out the front flap and lifting the top 
of carton. 



2. Remove the power cord, video cable, 
from the packing material. 



and documentation 



3. 



Lift out 
terminal 
material 
terminal 
fails. 



the top piece of packing material and remove the 

from the shipping carton. Save the packing 

and shipping carton. They are needed to ship the 

back to the repair center if the terminal ever 



4. Visually inspect the terminal for physical damage. If the 
terminal is damaged, notify your local DIGITAL Sales 
Office. 



5. Install the terminal as 
section of this chapter. 



described in the Installation 



2-3 



2.4 REPACKING 

Use the following procedure when repacking the VK100 terminal for 
shipment. Figure 2-3 shows all of the switch and cable locations. 

1. Turn the ac power switch off. 

2. Disconnect all cables from the rear of the terminal. 

3. Locate the original packing material. If the original 
materials are not available, they can be ordered from 
DIGITAL. Refer to Chapter 1 for ordering information. 

4. Repack the terminal in the shipping carton (Figure 2-2) . 
Include the power cord and video cable in the shipping 
carton . 

5. Seal the shipping carton with reinforced tape. 




MONOCHROME 
(BLACK & WHITE) 
VIDEO OUTPUT 
CONNECTOR 



RED, GREEN HARDCOPY 

AND BLUE CONNECTOR 

VIDEO OUTPUT 
CONNECTORS 



EIA 20 mA AC POWER 

CONNECTOR CONNECTOR RECEPTACLE 



Figure 2-3 VK100 (GIGI) Terminal Switch and Cable Locations 



2-4 



2.5 INSTALLATION 

The VK100 terminal is very easy to install. The only tool required 
is a flat blade screwdriver. Use the following procedure to 
install the terminal. 

1. Remove the terminal from the shipping carton or optional 
carrying case and place in the desired work area. 

2. Locate the access opening on the rear of the terminal 
(Figure 2-4) . The eight-position default SET-UP switch 
pack will be visible in the opening. 




Figure 2-4 Default SET-UP Switch Pack Location 



2-5 



3. Note the switch positions and determine if the switch 
settings are correct for the host computer system. Figure 
2-5 shows all the switch settings and what they mean to 
the host computer. Chapter 3 provides more detailed 
information on the SET-UP parameters. 



SET-UP FEATURE DEFAULT SETTINGS FOR BOTH TRANSMIT AND RECEIVE 
SPEEDS (TS AND RS) CONT. 
(SWITCHES 6, 7, & 8) 





TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
600 IRS2 AND TS2) 



TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
1200 IRS3ANDTS3J 





TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
2400 (RS4 AND TS4) 



TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
4800 (RS5 AND TS5) 





TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
9600 (RS6 AND TS6) 



TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
19,200 IRS7 AND TS7| 

MA-6722 



Figure 2-5 Default SET-UP Switch Pack 
Settings (Sheet 1 of 3) 



2-6 



SET-UP FEATURE DEFAULT SETTINGS FOR PARITY ENABLE (PE) 
(SWITCHES 4 & 5) 





PARITY ENABLE FEATURE 
DEFAULT SET FOR OFF <PE0) 



PARITY ENABLE FEATURE 
DEFAULT SET FOR EVEN (PE1) 




PARITY ENABLE FEATURE 
DEFAULT SET FOR ODD (PE2) 



SET-UP FEATURE DEFAULT SETTINGS FOR BOTH TRANSMIT AND RECEIVE 
SPEEDS (TSAND RSI 
(SWITCHES 6, 7, & 8) 





TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
110(RS0ANDTS0) 



TRANSMIT AND RECEIVE SPEED 
FEATURES DEFAULT SET FOR 
300 (RS1 ANDTS1) 



Figure 2-5 Default SET-UP Switch Pack 
Settings (Sheet 2 of 3) 



2-7 



SET-UP FEATURE DEFAULT SETTINGS FOR POWER FREQUENCY (PF) 
(SWITCH 1] 




POWER FREQUENCY FEATURE 
DEFAULT SET FOR 60 Hz 
(PFO) 




POWER FREQUENCY FEATURE 
DEFAULT SET FOR 50 Hz 
(PF1) 



SET-UP FEATURE DEFAULT SETTINGS FOR COMMUNICATIONS INTERFACE (Cll 
(SWITCH 2) 




COMMUNICATIONS INTERFACE 
FEATURE DEFAULT SET FOR 
EIA(CIO) 




COMMUNICATIONS INTERFACE 
FEATURE DEFAULT SET FOR 
20 mA (C1 1) 



SET-UP FEATURE DEFAULT SETTINGS FOR U K CHARACTER SET (UK) 
(SWITCH 3) 





UK CHARACTER SET FEATURE 
DEFAULT SET FOR US IUK0) 



UK CHARACTER SET FEATURE 
DEFAULT SET FOR UK (UK1) 



Figure 2-5 Default SET-UP Switch Pack 
Settings (Sheet 3 of 3) 



2-8 



If the default SET-UP switch pack settings are incorrect 
for the host computer, carefully change the switch 
settings with a pencil or a similar object. Once the 
switches are set, verify the new settings. If the 
settings are wrong, the terminal may not be able to 
communicate with the host computer. 

Remove the user-supplied monitor from its shipping carton 
and place in the desired work area. Perform the 
installation instructions packed with the monitor. 

Connect the VK100 terminal to the user-supplied monitor. 
(The next section of this chapter provides specific 
instructions for connecting to the Barco Model GD33 
monitor . ) 

Connect the communications cable to the appropriate 
communications connector. If you select EIA 
communications, connect the ground wire to the terminal 
communications connector. Figure 2-6 shows the cable 
connector with the ground wire connected. 



GREEN GROUND 
WIRE 



SCREW 




Figure 2-6 EIA Communications Cable Connector 



2-9 



8. Connect the VK100 terminal to the optional LA34VA 
graphics printer. There are two methods for this. Section 
2.5.3 provides detailed instructions. 

9. Connect the power cord to the power cord receptacle on 
the rear of the terminal. Plug the other end of the power 
cord into a nearby wall outlet. 

10. Turn the monitor power switch on. Allow the monitor one 
or two minutes to warm up before performing the next 
step. 

11. Turn the terminal power switch on. The terminal 
automatically performs the power-up self-test. Once the 
power-up self-test is successfully completed, the ON LINE 
indicator above the keyboard lights and the cursor 
appears in the upper left corner of the monitor screen. 
If any other indications are present, the terminal 
self-test may have found a fault in the terminal. Chapter 
6 outlines the procedures to follow if this occurs. 

NOTE 
On some monitors the cursor does not 
appear immediately because of a monitor 
condition called overscan. To eliminate 
the overscan, set the HP or HM SET-UP 
parameters. Chapter 3 describes these 
parameters. 

12. Select the terminal SET-UP parameters. Chapter 3 
describes the SET-UP parameters and how to select them. 

13. After selecting the SET-UP parameters, record their 
settings and keep them with the terminal for future 
reference. 

14. Fill out the GIGI Installation Card and return it to 
DIGITAL. Postage is prepaid if mailed within the United 
States. 



2-10 



2.5.1 Connecting to the Barco Model GD33 Monitor 
This section provides specific instructions for connecting the 
VK100 terminal to the Barco Model GD33 monitor. This monitor is 
not supplied by DIGITAL. The monitor must be purchased separately 
from a local Barco distributor. Monitor operating instructions are 
packaged with the monitor. 

1. Locate the VK100 video cable. It is a single cable with 
three connectors on each end. 

2. Connect the color-keyed red, green, and blue cable 
connectors to the RED, GREEN, and BLUE output connectors 
on the rear of the VK100 terminal. 

3. Connect the color-keyed red, green, and blue cable 
connectors to the RED, GREEN, and BLUE input connectors 
on the rear of the Barco Model GD33 monitor (Figure 2-7) . 

4. Locate the white switches on the rear of the monitor 
above the input connectors. Slide the white switches to 
the 75 position. This switches in a 75-ohm cable 
impedance and provides the best possible monitor display. 

5. Locate the G/X switch on the rear of the monitor. Slide 
the G/X switch to the G position. This sets the monitor 
synchronization for green signal sync. 

6. Connect the monitor power cord. 



2-11 



o o o 



o o o 



AC POWER 
'CONNECTOR 



SYNC INPUT 
LOAD SWITCH " 



SYNC SOURCE 

SELECT 

SWITCH 



BLUE INPUT 
NOT USED LOAD SWITCH 



GREEN INPUT RED INPUT 
LOAD SWITCH LOAD SWITCH 




EXTERNAL SYNC 

INPUTS 

(NOT USED) 



BLUE INPUTS 



GREEN INPUTS RED INPUTS 



Figure 2-7 Barco Model GD33 Monitor Connections 



2-12 



2.5.2 Connecting to a Typical Black and White Monitor 

The VK100 terminal can connect to a black and white (monochrome) 
monitor. DIGITAL does not supply a black and white monitor. Any 
black and white monitor must be obtained from local suppliers. 

Use the following general instructions to perform the 
interconnection. Specific operating instructions for the monitor 
are packaged with the monitor. 

1. Locate the VK100 video cable. It is a single cable with 
three connectors on each end. 

2. Connect one of the three cable connectors to the MONO 
output connector on the rear of the VK100 terminal. Note 
the cable connector color key (red, green, or blue). 

3. Locate the video input connector on the black and white 
monitor. This connector should be a BNC-type connector. 
If not, put a BNC adaptor on the connector. 

4. Connect the video cable to the video input connector on 
the monitor. Be sure to use the same color-keyed cable 
connector that was used on the terminal end of the cable. 

2.5.3 Connecting to the LA34VA Graphics Printer 

The VK100 terminal connects to the LA34VA graphics printer in one 
of two ways. 

1. The terminal connects directly to the printer. 

2. The terminal is added to the end of a multiterminal 
string . 

If the terminal connects directly to the printer, the printer is 
dedicated to that terminal. This means the printer is always 
available to the terminal. 

In a multiterminal string, two or more VK100 terminals connect to 
one printer. Each terminal contains a hardcopy protocol. This 
protocol prevents problems when more than one terminal tries to 
use the printer. To request using the printer, press the SHIFT and 
PF1/HARDC0PY keys together. The terminal looks to see if the 
printer is busy. If the printer is not busy the terminal 
immediately sends its data to the printer. 

If the printer is currently printing the terminal generates a 
print request and waits until the printer is available. The print 
request tells all other VK100 terminals that a terminal is waiting 
to use the printer. When the printer completes the copy the 
waiting terminal then sends its data to the printer. 



2-13 



When more than one terminal is waiting to use the printer an 
internal sequence system takes effect. The sequence system 
determines which terminal uses the printer next. The sequence 
system continues in effect until all of the waiting terminals have 
used the printer. 

When using a multi terminal string, all terminals in the string 
must be powered on. If any terminal in the string is turned off, 
that terminal and all terminals after it in the string cannot use 
the printer. Figure 2-8 shows this point. Terminal 3 is turned 
off, so terminal 4 cannot use the printer. Disconnect any terminal 
that is turned off in a multiterminal string from the string. 
Paragraph 2.5.3.2 provides a disconnection procedure. 

The following paragraphs provide the two procedures for connecting 
the VK100 terminal to the LA34VA graphics printer. 




GIGI TERMINAL 
#4 - CANNOT 
USE LA34VA 



LA34VA 
GRAPHICS PRINTER 





GIGI TERMINAL 
#3-P0WER OFF 



GIGI TERMINAL 

#2 



Figure 2-8 Multiterminal String with Terminal Turned Off 



2-14 



2.5.3.1 Connecting Directly to the LA34VA Graphics Printer — Use 

the following procedure for connecting a single VK100 terminal to 
the LA34VA graphics printer. Maximum cable length is 50 feet. 
Figure 2-9 shows a simple block diagram of this configuration. 



To perform the procedure use a flat blade screwdriver, 
interface cable, and one 8-32 X 5/8 inch screw. 



a BC22A-XX 



Locate and connect the BC22A cable to the HARDCOPY 
connector on the rear of the VK100 terminal. The 
connector can only plug in one way. Connect the ground 
wire to the HARDCOPY connector. Figure 2-6 shows the 
cable connector with the ground wire connected. 

Plug the other cable connector into the the EIA connector 
on the rear of the LA34VA graphics printer. This 
connector can only plug in one way (Figure 2-10) . 



GIGI 
TERMINAL 



} 



BC22A-XX 



HARDCOPY 
CONNECTOR 



c 



EIA 
CONNECTOR 



LA34VA 

GRAPHICS 

PRINTER 



Figure 2-9 Single VK100 (GIGI) Terminal to LA34VA Graphics Printer 
Connection 




-EIA 
CONNECTOR 



PAPER LOW- 
JACK 



Figure 2-10 LA34VA Graphics Printer (Rear View) 



2-15 



3. Push the 8-32 X 5/8 inch screw through the ring terminal 
on the end of the ground wire coming out of the cable 
connector. Locate the grounding screw hole on the LA34VA 
graphics printer (about 3 inches to the right of the EIA 
connector) . Attach the cable ground wire to the LA34VA 
graphics printer grounding point. 

4. Perform the installation and SET-UP procedures outlined 
in the DECwriter IV Graphics Printer User Guide 
(EK-L34RO-UG) . 

5. Apply power to both terminals. 



6. 



7. 



2.5.3.2 



To verify the LA34VA graphics printer connection, place 
the screen alignment video pattern on the monitor screen. 
Do this by pressing the following keys in order: SET-UP, 
S, T, 4, and SET-UP again. 

Print the screen alignment video pattern on the LA34VA 
graphics printer. Do this by pressing the SHIFT and 
PF1/HARDC0PY keys together. 



Adding a Terminal to a Multitermimal String — Use the 

following procedure if one or more VK100 terminals are connected 
to the LA34VA graphics printer. Figure 2-11 shows a simple diagram 
of this configuration. 



NEW 
STRING 







BC22B-XX 


n~|BC26B-01| | | 


BC22A-XX 








r 


Ur^ 


' 111 


\ 








HARDCOPY 




HARDCOPY 




EIA 




^~~\ CONN. 




f^CONN. 




P^ CONN. 


OLD 
STRING 


GIGI 
TERMINAL 




GIGI 
TERMINAL 




LA34VA 

GRAPHICS 

PRINTER 




BC22BXXINEW) 

( 


BC2 


3B-01 

N) rT|BC22B-X 


w^ 


B-Oirn BC22 


A-XX 

> 






HARDCOPY 




HARDCOPY 




HARDCOPY 




EIA 


r 


ICONN. 




l -1- ] CONN. 




(- 1 — | CONN. 




| — '""ICONN. 


NEWGIGI 
TERMINAL 




GIGI 
TERMINAL 




GIGI 
TERMINAL 




LA34VA 

GRAPHICS 

PRINTER 






















MA 6729 



Figure 2-11 Adding a Terminal to a Multiterminal String 



2-16 



To perform the procedure use a flat blade screwdriver, a BC22B-xx 
interface cable, and a BC26B-01 Y-type cable. 

1. Locate the last VK100 terminal in the string attached to 
the LA34VA graphic printer. Disconnect the cable 
connected to the HARDCOPY connector on the rear of this 
terminal . 

2. Locate and connect the BC26B-01 Y-type cable to the 
HARDCOPY connector on the last VK100 terminal. The 
connector can only plug in one way. Connect the ground 
wire to the HARDCOPY connector. Figure 2-6 shows the 
cable connector with the ground wire connected. 

3. Connect the cable disconnected from the terminal in step 
2 to the female connector of the BC26B-01 Y type cable. 

4. Locate the new BC22B cable. Plug one BC22B cable 
connector into the male BC26B-01 cable connector. The 
connector can only plug in one way. Connect the ground 
wire between the two connectors. Figure 2-6 shows the 
cable connector with the ground wire connected. 

5. Plug the other BC22B cable connector into the HARDCOPY 
connector on the VK100 terminal being added to the 
string. The connector can only plug in one way. Connect 
the ground wire to the HARDCOPY connector. Figure 2-6 
shows the cable connector with the ground wire connected. 

6. Apply power to both terminals. 

7. To verify the LA34VA graphics printer connection, place 
the screen alignment video pattern on the monitor screen. 
Do this by pressing the following keys in order: SET-UP, 
S, T, 4, and SET-UP again. 

8. Print the screen alignment video pattern on the LA34VA 
graphics printer. Do this by pressing the SHIFT and 
PF1/HARDC0PY keys together. 



2-17 



2.5.3.3 Removing a Terminal from a Multiterminal String — Use 

the following procedure if two or more VK100 terminals are 

connected to the LA34VA graphics printer. Figure 2-12 shows a 
simple diagram of the procedure. 

1. Locate the VK100 terminal you want to disconnect. 

2. Locate the BC26B-01 Y-type cable connected to the 
HARDCOPY connector on the rear of this terminal. 
Disconnect the two cables connected to the BC26B-01 
Y-type cable. 

3. Connect the two cables that were removed from the 
BC26B-01 Y-type cable. Be sure to connect the cable 
ground wires between the two connectors. Figure 2-6 shows 
the cable connectors with the ground wire connected. 

The terminal is now disconnected from the multiterminal string. 



BC22B-XX 



HARDCOPY 

CONN. 



GIGI 
TERMINAL 



m 



BC22B-XX 



-{ff^TO 



BC22A-XX 



BC26B-01 



Y U 



HARDCOPY 
CONN. 



DISCONNECTED 
GIGI TERMINAL 



HARDCOPY 
CONN. 



GIGI 
TERMINAL 



EIA 
CONN. 



LA34VA 

GRAPHICS 

PRINTER 



Figure 2-12 Removing a Terminal from a Multiterminal String 



2-18 



2.6 HARDWARE INTERFACE INFORMATION 

2.6.1 General Communications Interface Information 

The terminal operates on full-duplex, asynchronous communications 
lines. The physical interfaces are implemented using a 25-pin EIA 
connector and a 20 mA loop connector. 

2.6.1.1 Baud Rate -- Transmit and receive baud rates are 
programmed through the keyboard using the SET-UP commands. Both 
transmit and receive baud rates can be set independently to: 110, 
300, 600, 1,200, 2,400, 4,800, 9,600, or 19,200 baud. 

The terminal (set up for jump scroll) supports text writing speeds 
up to 300 baud without using the XON/XOFF characters for 
synchronization. 

2.6.1.2 Character Format -- The format of the asynchronous 
character is bit serial, consisting of a start bit (always SPACE), 
seven data bits (MARK equals binary 1, SPACE equals binary 0) an 
optional parity bit, and one or two stop bits (always MARK). The 
data bits are ASCII coded, and the least significant bit is 
transmitted or received first. 

The parity bit can be programmed for odd or even parity. If parity 
is disabled, the eighth bit is set to SPACE and no parity checking 
occurs on input. If parity is enabled and parity errors are 
detected, the error character is displayed. 

All baud rates have one stop bit per transmitted character, except 
110 baud which has two stop bits per character. 

The communication data format outlined here is programmed using 
SET-UP commands. 

2.6.2 EIA Interface 

2.6.2.1 Physical Interface — The basic VK100 terminal operates 
on full-duplex, asynchronous communication lines. The terminal 
interfaces to the line with a 25-pin connector mounted on the back 
of the terminal. This connector meets the requirements of EIA Std 
RS-232-C. Table 2-1 summarizes the EIA connector signals. The 
following paragraphs explain how the basic VK100 terminal uses 
each signal. 

Protective Ground - Pin 1 — This conductor connects to the 
terminal system ground via a jumper. The conductor cannot be used 
for reference potential purposes. 

Transmitted Data (from VK100 terminal) — Pin 2 — The VK100 
terminal transmits serially encoded characters and break signals 
on this circuit. The circuit is held in the mark state when the 
terminal is not transmitting characters or break signals. 



2-19 



Table 2-1 EIA Connector Signals 



EIA/CCITT 
Pin Description Circuit 



1 


Protective 


ground 


AA/101 


2 


Transmitted 


1 data 


BA/10 3 


3 


Received data 


BB/104 


4 


Request to 


send 


CA/10 5 


5 


(not 


used) 




— 


6 


Data 


set ready 


CC/107 


7 


Signa 


il ground* 


AB/102 


8 


(not 


used) 




— 


9 


(not 


used) 




— 


10 


(not 


used) 




— 


11 


(not 


used) 




— 


12 


(not 


used) 




— 


13 


(not 


used) 




— 


14 


(not 


used) 




— 


15 


(not 


used) 




— 


16 


(not 


used) 




— 


17 


(not 


used) 




— 


18 


(not 


used) 




-- 


19 


(not 


used) 




— 


20 


Data 


terminal ready 


CD/108. 2 


21 


(not 


used) 




— 


22 


(not 


used) 




— 


23 


(not 


used) 




-- 


24 


(not 


used) 




— 


25 


(not 


used) 




— 



* Common return 



2-20 



Received Data (to VK100 terminal) — Pin 3 — The VK100 terminal 
receives serially encoded characters generated by the user's 
equipment on this circuit. The terminal is always ready to accept 
and interpret data after power-up, except in local mode. 

Request To Send (from VK100 terminal) — Pin 4 — This signal is 
always asserted (SPACE state) when the terminal is powered up and 
in the on-line mode. 

Clear To Send (from VK100 terminal) — Pin 5 — A circuit exists 
for this signal, but the signal is ignored at all times. 

Data Set Ready (to VK100 terminal) — Pin 6 — A receiver exists 
for this signal, but the signal is ignored at all times. 

Signal Ground — Pin 7 — This conductor establishes the common 
ground reference potential for all voltages on the interface. It 
connects to the VK100 terminal system ground. 

Data Terminal Ready (from VK100 terminal) — Pin 20 — The data 
terminal ready (DTR) signal is always asserted, except under the 
following conditions. 

1. When the terminal is not powered up 

2. When the terminal is in local mode 

3. During the 3.5 second interval following the pressing of 
SHIFT and BREAK. 

NOTE 
This use of data terminal ready (DTR) 
signal disconnects local and remote data 
sets when you press SHIFT and BREAK. It 
also prevents automatic answering when 
the terminal is in local mode or powered 
off. This use of DTR also causes the 
line to disconnect when the VK100 
terminal switches from on-line to local 
mode . 

2.6.2.2 Electrical Characteristics — The EIA interface has the 
following characteristics. On all signals generated by VK100 
terminal, the mark or unasserted state is -6 V to -12 V; the space 
or asserted state is +6 V to +12 V. On signals received by VK100 
terminal, -25 V to +0.75 V or an open circuit is interpreted as a 
mark or unasserted state; and +25 V to +2.25 V is interpreted as a 
space or asserted state. Voltages greater than +25 V are not 
allowed. These levels are compatible with EIA Std RS-232-C and 
CCITT Recommendation V.28. 



2-21 



2.6.2.3 EIA Interface Cables — Table 2-2 lists the recommended 
communication cables for use with the EIA interface. 



Table 2-2 EIA Interface Cables 



Cable 

Part Number 



Cable Function 



BC22A-10 



BC22A-25 



BC22B-10 



BC22B-25 



EIA null modem; connects VK100 terminal 
directly to a line unit (6 conductor 
cable) 

EIA null modem; connects VK100 terminal 
directly to a line unit (6 conductor 
cable) 

EIA extension to modem (14 conductor 
cable) 

EIA extension to modem (14 conductor 
cable) 



2.6.3 20 mA Current Loop Interface 

The VK100 terminal current loop interface is a passive 
configuration, that is, current must be supplied to the VK100 
terminal. The transmitter and receiver are both passive and 
optically isolated; the transmitter goes to the mark state when 
power is turned off. Table 2-3 lists the recommended 20 mA current 
loop characteristics. 



Table 2-3 20mA Current Loop Characteristics 



Condition 



Transmitter 


Receiver 


Min Max 


Min 


Max 


5V 50V 


N/A 


N/A 


0V 4V 




2.3V 


2mA 




3mA 


20mA 50mA 


15mA 


50mA 



Open circuit voltage 
Voltage drop marking 
Spacing current 
Marking current 



2-22 



2.6.3.1 Electrical Characteristics — The 20 mA current loop 
interface has the following electrical characteristics. 

2.6.3.2 20 mA Interface Cables — Table 2-4 lists the recommended 
communication cables for use with the 20 mA interface. 

2.6.4 Buffer Overflow Prevention 

The VK100 terminal can operate at transmission speeds up to 19,200 
baud. However, the terminal may not be able to keep up with 
incoming data. The terminal stores incoming characters in a 
253-character buffer and processes them on a first-in, first-out 
basis. When the contents of the buffer reaches 100 characters, the 
terminal transmits XOFF (023g or DC3) . On this signal the host 
computer should stop transmitting to the terminal. If the host 
stops transmitting, the terminal eventually depletes the buffer. 
When 50 characters remain in the buffer, the terminal transmits 
XON (021- or DC1) to signal the host that it may resume 
transmission. If the host fails to respond promptly to the XOFF 
signal, the buffer continues to fill. When the buffer exceeds its 
253-character capacity, a buffer overflow occurs. When the buffer 
overflows, the VK100 terminal ignores any incoming characters. 



Table 2-4 20mA Interface Cables 



Cable 

Part Number Function 



BC05F-15 20 mA cable with Mate-N-Lok connectors 

for connecting VK100 terminal directly to 
a line unit. 

BC05F-50 20 mA cable with Mate-N-Lok connectors 

for connecting VK100 terminal directly to 
a line unit. 

BC05F-A0 20 mA cable with Mate-N-Lok connectors 

for connecting VK100 terminal directly to 
a line unit. 



2-23 



The only indication of a buffer overflow is the loss of data on 
the monitor screen. The terminal does not display special 
characters on the screen to indicate this condition. Use the 
following formula to determine a possible buffer. 

Response time = 153 X 10 / rec speed — 3 X (trans bits / trans 
speed) 

where : 

Rec speed = VK100 terminal receive speed in bits/second (baud) . 

Trans bits = 10, except at 110 baud where it is 11. 

Trans speed = VK100 terminal transmit speed in bits/second (baud) . 

NOTE 
The response time is less than only 
when the receive speed is 19,200 baud 
and the transmit speed is 110 baud. 
Never use this combination of receive 
and transmit speeds. 

Example 1 

The VK100 terminal is transmitting at 1200 baud and receiving at 
1200 baud. The terminal sends an XOFF signal which the host must 
respond to within 1.25 seconds to avoid the buffer overflow. 

Response time = 153 X (10/1200) — 3 X (10/1200) = 1.25 seconds 

Example 2 

The VK100 terminal is transmitting at 300 baud and receiving at 
1200 baud. The terminal sends an XOFF signal which the host must 
respond to within 1.175 seconds to avoid a buffer overflow. 

Response time = 153 X (10/1200) — 3 X (10/300) = 1.175 second 

The XON/XOFF synchronization scheme has an advantage over 
requiring the host to insert delays or filler characters in its 
data stream. Requiring a minimum of software support, XON/XOFF 
makes sure that every character or command sent to the VK100 
terminal is processed in correct order. This scheme frees 
interface programs from all timing considerations and produces 
more reliable operation. 

Software that does not support XON/XOFF signals from the VK100 
terminal can still use the terminal in text or interactive mode. 
To do so limit the terminal receive speed to 300 baud in jump 
scroll mode, or 4800 baud in wrap scroll or scroll off modes. Set 
the receive higher only if the average line length of the data is 
known. Table 2-5 shows the maximum speeds (baud rates) for each 
scroll mode selection at different line lengths. 



2-24 



Table 2-5 Terminal Receive Speed Limits (No XON/XOFF Support) 

Scroll Average Line Length in Characters 

Mode 10 20 30 40 50 60 70 80 



Smooth 

Jump 

Wrap/Off 




300 

4800 


600 

1200 

4800 


1200 
2400 
4800 


1200 
2400 
4800 


1200 
2400 
4800 


1200 
2400 
4800 


2400 
2400 
4800 


2400 
2400 
4800 


2400 
2400 
4800 



Speeds are expressed as baud rates. 

If XON/XOFF cannot be used, use fill characters after certain 
characters or character strings are sent to the VK100 terminal. 
Table 2-6 shows the number of fill characters required for these 
functions. Use either the NUL (000 ) or the DEL (177 g ) as fill 
characters. 

XON/XOFF support is required whenever the terminal is in the 
following modes. 

Auto Hardcopy (AH1) 

Graphics mode 

BASIC mode (BA1 or BA2) 

If the host computer does not support XON/XOFF buffer 
synchronization, data will probably be lost. Fill characters and 
pauses after transmission do not prevent data loss due to the 
varying sequence execution times. 



Table 2-6 Fill Character Requirements 



Character Receive Speed 

or Sequence 

Received 110 300 600 1200 2400 4800 9600 19200 

TAB — — — — — — 12 

Text — — — — — — 13 

ED (char) — — — — — — 3 9 

CAN — — ______ ! 2 4 

EL — — — __ 2 6 15 32 

FF — 2 4 9 19 39 79 159 

DECALN — 3 9 21 45 93 189 381 

ED (full) 1 9 20 42 86 175 353 709 



2-25 



Two terminal functions, reset and self-test, reinitialize the 
terminal and erase the buffer. This means characters received 
after the commands to perform these two functions are lost without 
being processed. 

To compensate for this, the host computer may act in one of the 
two following ways. 

1. Immediately after sending the terminal one of these 
commands the host may act as if it had received XOFF. 
Thus the host will not send additional characters until 
it receives XON. The terminal transmits XON only after it 
completes the specified operation and the XON/XOFF 
feature is enabled. 

2. When the first method cannot be implemented, the host may 
use a delay of no less than 10 seconds to allow the 
terminal time to complete the invoked function. If the 
invoked function detects an error, there is no guarantee 
against loss of data. This delay is currently adequate, 
however, future options may require a change in the delay 
period. 

The VK100 terminal always recognizes received XOFF and XON 
signals. Receipt of XOFF inhibits the VK100 terminal from 
transmitting any codes except XOFF and XON. Up to 253 keystrokes 
are stored in a keyboard buffer (some keys transmit two or three 
codes, e.g., cursor controls). If the keyboard buffer overflows, 
keyclicks stop. Transmission resumes upon receipt of XON. 

Entering and exiting SET-UP clears all stored keyboard characters 
and the keyboard locked condition. 

2.6.5 Display Interface 

The display interface provides the circuitry needed to drive one 
black and white monitor and one red, green, and blue (RGB) color 
monitor at the same time. Four separate BNC connectors are located 
on the rear of the terminal and are labeled as follows. 

MONO 
RED 
GREEN 
BLUE 

These connectors provide the signals needed to drive both black 
and white and color monitors. 

2.6.5.1 Composite Video Port (MONO) — This interface connector 
drives an external black and white monitor. The output conforms 
to EIA RS-330 and has the following nominal characteristics. 

Output impedance 75 ohms, dc coupled 

Sync level 0.0 V to 0.1 V 

Black level 0.3 V +/- 10% when terminated with 75 ohms 

White level 1.0 V +/- 10% when terminated with 75 ohms 

2-26 



2.6.5.2 Color Monitor Port (RED, GREEN, BLUE) — These interface 
connectors drive an external RGB color monitor. The RED, GREEN, 
and BLUE outputs have the following nominal characteristics. 

Output impedance 75 ohms, dc coupled 

Red and blue signal outputs 

Signal level 1.0 V +/- 10% 

Green signal outputs 

Signal level 1.0 V +/- 10% 
Sync level 0.0 V to 0.1 V 
Black level 0.3 V +/- 10% 

2.6.5.3 Composite Sync Waveform Timing — The composite sync 
waveform conforms to EIA RS-330 and has the following nominal 
characteristics. 

Horizontal period 63.131 ~s (15.840 KHz) 

Horizontal sync width 4.735 ~s 

Front porch 0.789 to 7.891 ~s. The exact 

timing depends upon the HP 
SET-UP feature setting. When 
set to HP5 the front porch is 
3.945 ~s. 

Back porch 7.891 ~s minus front porch time 

Active video time 50.505 ~s 

Frame rate 

Noninterlaced (IL0) 60.00 Hz (PF0) or 49.97 Hz 

(PF1) 

Interlaced (IL1) 29.94 Hz (PF0) or 24.95 Hz 

(PF1) 

Vertical sync width 189.394 ~s 

Serration during vertical none 
sync 

Vertical blank 1.262 ms minimum (PF0) 

4.609 ms minimum (PF1) 

Horizontal scans per frame 264 (PF0 and IL0) 

317 (PF1 and IL0) 

529 (PF0 and IL1) 

635 (PF1 and IL1) 



2-27 



2.6.5.4 Monitor Selection — The display interfaces to drive a 
number of commercially standard monitors. Monitors connected to 
the VK100 terminal should have the following capabilities. 

Video bandwidth 8 MHz minimum 

Horizontal flyback time 12 ~s maximum 

Vertical flyback time 1.0 ms maximum (525-line 

monitor) 4.3 ms maximum 
(625-line monitor) 

Line rate 15.840 KHz 

Frame rate 60 Hz or 50 Hz 

Aspect ratio adjustable to 1:1.6 

DC restoration 

To present the best possible display, the VK100 terminal contains 
a number of SET-UP selectable features to tailor the video output 
of the terminal to the monitor. These features are as follows. 

Feature Function 

PF0 For 60 Hz, 525-line monitors 

PF1 For 50 Hz, 625-line monitors 

HP0 to HP9 For horizontal centering 

HM0 to HM9 To horizontally limit the text display area 

for monitors with overscan 

VM0 to VM9 To vertically limit the text display area for 

monitors with overscan 

EMI For 40 characters per line display text on low 

resolution monitors 

IL0 For a noninterlaced display to reduce flicker 

IL1 For an interlaced display on a monitor with a 

slow phospher, or for taking monitor screen 
photographs 

2.6.5.5 Video Interface Cables — Table 2-7 lists the recommended 
communication cables for use with the video interfaces. 



2-28 



Table 2-7 Video Interface Cables 



Cable 

Part Number Function 



BC26M-05 RGB cable with BNC connectors for 

user-supplied monitor 



2.6.6 Hardcopy Interface 

The terminal has a serial interface port for interfacing to a 
LA34VA graphics printer; this allows dumping of bit map 
information to obtain a hardcopy. A series-chaining scheme allows 
more than one VK100 terminal to share a single graphics printer. 

2.6.6.1 Physical Interface — The interface to an external 
hardcopy device uses a standard 25-pin female EIA connector. 
Table 2-8 lists the pin assignments. 



Table 2-8 Hardcopy Interface Pin Assignments 



Pin Signal Name 



1 Protective Ground 

2 Downstream Transmitted Data (DTXD) 

3 Downstream Received Data (DRXD) 

4 Downstream Request To Send (DRTS) 

5 Downstream Clear to Send (DCTS) 
7 Signal Ground 

13 Upstream Clear To Send (UCTS) 

14 Upstream Transmitted Data (DTXD) 
16 Upstream Received Data (DRXD) 

19 Upstream Request To Send (URTS) 



2-29 



2.6.6.2 Electrical Interface — The electrical characteristics of 
the hardcopy interface are as follows. On signals generated by the 
VK100 terminal, the mark or unasserted state is -6 V to -12 V; the 
space or asserted state is +6 V to +12 V. These levels are 
compatible with EIA Std RS-232-C and CCITT Recommendation V.28. 

On signals received by the VK100 terminal, -25 V to +0.75 V or an 
open circuit is interpreted as a mark or unasserted state, and +25 
V to +2.25 V is interpreted as a space or asserted state. 
Voltages greater than +25 V are not allowed. These levels are 
compatible with EIA Std RS-232-C and CCITT Recommendation V.28. 

2.6.6.3 Hardcopy Interface Cables -- Table 2-9 lists the 
recommended communication cables for use with the hardcopy 
interface. 

2.6.6.4 Hardcopy Device Sharing — The VK100 terminal contains 
the necessary logic for series-chaining to another VK100 terminal 
to time share a single hardcopy device. For every series-chained 
VK100 terminal, a Y-cable (BC26B-01) and a modem cable (BC22B-X) 
are needed. Chapter 5 provides instructions on how to connect the 
terminal in a series chain. 

There is no limitation on the number of VK100 terminals chained 
to the hardcopy device as long as the maximum cable length between 
adjacent terminals is 50 ft. The 50 ft maximum cable length 
conforms to RS-232-C/CCITT V.28 interface specifications. In 
practice the number of VK100 terminals served by a single printer 
is limited by the maximum response time users will accept. 

When a VK100 terminal is powered off, all upstream terminals 
(those farther away from the hardcopy device) are broken off the 
chain. The cabling system allows downstream terminals to bypass 
the Y-cable on the powered-off terminal and remain in the chain. 
As a general practice disconnect all powered-off terminals from 
the chain. This eliminates the possibility of inducing noise 
pulses in the chain, which may cause an erroneous printout. 



2-30 



Table 2-9 Hardcopy Interface Cables 



Cable 

Part Number Function 



BC26B-01 Y-cable for daisy-chaining the LA34VA graphics 
printer to multiple VK100 terminals 

BC22B-25 EIA extension to second VK100 terminal from Y-cable 

(BC26B-01) 

BC22A-10 EIA null modem; connects VK100 terminal directly to 

a line unit(6 conductor cable) 

BC22A-25 EIA null modem; connects VK100 terminal directly to 
a line unit (6 conductor cable) 



2-31 



3.3 KEYBOARD CONTROLS 

The VK100 terminal has two keypads. The main keypad has a key 
arrangement and sculpturing styled like a standard office 
typewriter. The auxiliary or numeric keypad allows you to enter 
numeric data in a calculator-like fashion. 

The following paragraphs describe the different VK100 terminal 
keyboard control groups and their functions. 

Standard keys 
Special function keys 
SET-UP mode keys 
Special mode keys 

3.3.1 Standard Keys 

Figure 3-2 identifies the VK100 terminal keyboard keys that 
usually operate like standard typewriter and calculator keys. 
These keys generate ASCII codes which the terminal transmits to 
the host computer. The minus, comma, period, and numeric keys of 
the auxiliary keypad normally generate the same codes as the 
corresponding unshifted keys of the main keypad. The SHIFT key on 
the main keypad does not affect the codes generated by the keys on 
the auxiliary keypad. 

The auxiliary keypad has two alternate modes of operation: keypad 
application mode and programmed keypad mode. The terminal can 
enter either mode through the SET-UP parameters or a command from 
the host computer. In both modes the auxiliary keypad generates 
control functions. 



3-2 



ONLINE LOCAL NO SCROLL BASIC HARDCOPV LI LI 

o o o o o o o 




RnnFinnRRFTfTmiTir^nr^r 




Figure 3-2 Standard Keys 




CAPS LOCK 

This key enables the uppercase function of alphabetic keys only. 
All numeric and special symbol keys remain in lowercase. 



■■■■■ SHIFT 

This key enables the uppercase function of all keys. If a key does 

not have an uppercase function, the SHIFT key has no effect. 



3-3 



ONLINE LOCAL NO SCROLL BASIC HAftDCOPY Lt LZ 

o o o o o o o 



3 



♦ f » 



w 



BELL 

G 



N M 



:oati< 









• W1 


■■■,m 


7 


8 


9 


- 


4 


5 


6 


> 










1 


2 


3 


ENTER 












Figure 3-3 Special Function Keys 



3.3.2 Special Function Keys 

Figure 3-3 identifies the special function keys on the VK100 

terminal keyboard. The following paragraphs provide a general 

description. 




SET-UP 

Pressing this key causes the VK100 terminal to enter SET-UP mode. 
Terminal parameters such as scrolling can be changed in this mode. 




Arrows 

Each of these keys causes the VK100 terminal to transmit a control 
function code to the host computer. Usually the control functions 
are interpreted as commands to move the cursor in the direction of 
the arrow. 




BREAK 

This key transmits a break signal. Pressing BREAK with either of 
the SHIFT keys transmits the long break signal. 



mSSm PF1/HARDC0PY 

Pressing this key by itself causes the VK100 terminal to transmit 

a control function code. 

Pressing this key with either of the SHIFT keys causes the 
optional printer to copy the current contents of the monitor 
screen. During the copying process the screen is frozen. Once the 



3-4 



printer finishes the copy, the screen resumes normal operation. If 
a printer is not connected to the terminal, pressing this key 
freezes the screen for a short time just as if a printer was 
copying the screen. 

Pressing the SHIFT and PF1/HARDC0PY keys a second time stops the 
printing of the screen contents. When this occurs the terminal 
returns to the previous operating mode. 




PF2/L0CAT0R 

Pressing this key by itself causes the VK100 terminal to transmit 
a control function code. 

Pressing this key with either of the SHIFT keys causes the 
terminal to enter locator mode and display the locator cursor 
( + ) on the screen. Section 3.3.4 provides more information on 
the locator mode. 




PF3/TEXT 

Pressing this key by itself causes the VK100 terminal to transmit 
a control function code. 

Pressing this key with either of the SHIFT keys causes the 
terminal to enter text mode and disable graphics mode. When it 
enters text mode, the terminal cancels any special graphics 
display parameters that were selected. If the terminal was already 
in text mode, pressing this key resets any special text features. 




PF4/RESET 

Pressing this key by itself causes the VK100 terminal to transmit 
a control function code. 

Pressing this key with either of the SHIFT keys resets the 
terminal. This action is almost the same as turning the power 
switch off and on. All of the contents of memory are lost except 
the SET-UP parameter settings, soft character sets, BASIC program, 
graphics mode macrographs, and any special key definitions. This 
reset function does not change the SET-UP parameter settings. 




DELETE 

This key causes the VK100 terminal to transmit a delete character 
code to the host system. The deleted character may or may not be 
erased from the screen. 



3-5 




RETURN 

This key transmits either a carriage return (CR) 
carriage return (CR) and line feed (LF) code. Select 
function through the New Line (NL) SET-UP parameter. 




LINE FEED 
This key transmits a line feed (LF) code. 



code or a 
the desired 




NO SCROLL 
This key is controlled by 
parameter is on, pressing 
transmission from the host 
also lights the NO SCROLL 
that the terminal 
key a second time 



the XO SET-UP parameter. If the XO 

this key the first time stops data 

computer to the VK100 terminal. This 

indicator above the keyboard, to show 

is not sending or receiving data. Pressing the 

resumes transmission from where it stopped. This 



also turns off the NO SCROLL indicator. If the XO parameter is 
off, this key is inactive and has no effect on the terminal. 




CONTROL 

Pressing this key in combination with another key causes the VK100 
terminal to transmit a control code. 




ESCAPE 
This key transmits an escape code. 



3-6 



ONLINE LOCALNDSCROLL BASIC HA8DCOPY LI L2 

o o c o o o o 



3 






a 



■m 



& i :;; :iX: 



H 



\m : 



m 



imi 

A till nil .;■»*<*■«*«■■* 



H 



+ - 



BEti 



:K: it 



m 



M 



< > ? 



m 





PF1 
HARD 
COPY 


PF2 
LOCTR 


PF3 
TEXT 


Wm 










7 


8 


9 


- 










4 


5 


6 


J 










1 


2 


3 


ENTER 












Figure 3-4 SET-UP Mode Keys 



3.3.3 SET-UP Mode Keys 

Figure 3-4 identifies the keys available in SET-UP mode. 

3.5 provides a detailed description of the SET-UP mode. 



Section 



SPACE BAR or UP ARROW 
Either key steps to the next higher setting for a SET-UP 
parameter. When the highest value is reached, the setting returns 
to and starts the cycle over again. Each key performs the same 
function. 





DOWN ARROW 

This key steps to the next lower setting for a SET-UP parameter. 
When is reached the setting returns to the highest value and 
starts the cycle over again. 




RETURN or RIGHT ARROW 
Either key steps the terminal to the next SET-UP parameter. When 
the last parameter appears on the screen, the terminal 
automatically returns to the first SET-UP parameter, 
performs the same function. 



Each key 



3-7 




LEFT ARROW 

This key steps the terminal backwards to the previous SET-UP 
parameter. When the first parameter appears on the screen, the 
terminal automatically returns to the last SET-UP parameter. 

Alphabetic Keys — These keys enter the two-letter code for each 
SET-UP parameter. This displays any SET-UP parameter without 
stepping through all the parameters. If the operator types an 
incorrect code, the terminal sounds the bell tone and displays the 
last correct parameter. 

Numeric Keys — These keys enter the numeric parameter setting of 
a SET-UP parameter. This sets a parameter without stepping through 
all the parameter settings. If the operator types an incorrect 
setting, the terminal sounds the bell tone and displays the last 
correct parameter setting. 




PF4/RESET 

Pressing this key with either of the SHIFT keys resets the 
terminal to the power-up state. All the contents of memory, 
including the SET-UP parameter settings, are lost. Pressing these 
keys in SET-UP mode is the same as turning the terminal power 
switch off and on. 

When the operator presses this key by itself, the terminal sounds 
the bell tone. 



3-8 



ON LINE LOCAL NO SCROLL BASIC HARDCOPY LI L2 

o o o o o o o 



! ©> 4* £ 

12 3 



'A * 
5 6 



mm. 



w 



BELL 



Witts 



: <**? ■ 



M 



W*m m 







pri 

HARD 
COPY 




PF3 

TEXT 


PF4 
HtSET 














7 


8 


9 


- 














4 


5 


6 


> 














1 


2 


3 












O 











Figure 3-5 Locator Mode Keys 



3.3.4 Locator Mode Keys 

Figure 3-5 identifies the keys that have a special meaning to the 
terminal in locator mode. The following paragraphs briefly 
describe the function of the locator keys in locator mode. If the 
operator presses any keys other than those described, the terminal 
exits locator mode, sends the code of the key pressed, and then 
sends the screen location of the locator cursor. If the terminal 
enters locator mode through the host computer, the terminal sends 
a carriage return (CR) code followed immediately by the key code. 




PF2/L0CAT0R 

Pressing this key 
terminal to enter 
( + ) on the screen. 



with either of 
locator mode and 



the SHIFT keys causes the 
display the locator cursor 




ARROWS 

These keys move the locator cursor ( + ) around the screen. Each 
time the operator presses the key, the locator cursor moves one 
dot in the direction shown by the arrow on the key. Pressing SHIFT 
with one of the arrow keys moves the locator cursor ( + ) ten dots 
in the direction shown by the arrow on the key. 



3-9 



ENTER 


1 


1 




1 


RETURN 



ENTER or RETURN 

Either of these keys end the locator mode. The terminal sends 
screen position of the locator cursor to the host computer. 



the 




DELETE 

This key ends the locator mode; however, the terminal does not 
send the screen position of the locator cursor to the host 
computer. If the terminal enters locator mode through the host 
computer, the terminal sends a carriage return (CR) code. 



3.4 VISUAL AND AUDIBLE INDICATORS 

The VK100 terminal has two types of indicators: visual indicators 

above the keyboard, and audible alarms. 



3.4.1 Visual Indicators 

Figure 3-6 shows the location of the keyboard indicators, 
following paragraphs describe the function of each indicator. 



The 



ON LINE 

This indicator lights to show that the VK100 terminal is on-line 
and ready to transmit or receive messages from the host computer. 
The ON LINE indicator can also show self-test errors. 

LOCAL 

This indicator lights to show that the terminal is off-line and 
cannot communicate with the host computer. In local mode the 
keyboard remains active and all typed characters appear on the 
screen. The LOCAL indicator can also show self-test errors. 



3-10 





1 


11 


._. ; . :; : ' : : 








TTrr 








'..;, 




" — 




























SETUP 


o o o o 


illil 


t 


♦ 


- 


- 






- 1 i 1 


2 


#e[| $ II % 1 

3 || 4 || 5 | 


A 1 

6 


& 

7 


* 
8 


i < 
1 9 


| ) 
| 


— 


+ 


\ 


BACK 

SPACE 


BREAK 




TAB II Q 


W 


E R T Y U 1 


II ° 


F 


II { 
II [ 


111 


"| 




OELETE 




CTRL 


CAPS 
LOCK 


±K 


D 


F 


BELL 

G 


H 


J 


K 


L 


5 


I 


RETURN 


1 
\ 




NO 
SCROLL 


SHIFT 


|| Z |l X 


c 


V 


B || N 


M 


| < 


| > || ? || 


SHIFT LIN! 
FEED 































PF1 
HARD 
COPY 


PF2 
LOCTR 


PF3 
TEXT 


PF4 

RESET 










7 


8 


9 


- 










4 


5 


6 


» 










1 


2 


3 


ENTER 














Figure 3-6 Keyboard Indicators 



NO SCROLL 

This indicator lights to show that the NO SCROLL key was pressed 
and the terminal is no longer receiving or sending data to the 
host computer. The codes for any keys pressed while the NO SCROLL 
indicator is on are stored in the terminal and sent after the 
indicator turns off. To continue sending or receiving data, press 
NO SCROLL a second time. The NO SCROLL indicator is inactive if 
the XO SET-UP parameter is off (XO0) . 



BASIC 

This indicator lights to 

program mode. In this 

entered on the keyboard 

BASIC language commands. 

errors. 



show that the terminal is in the BASIC 
mode the terminal interprets all data 

or received from the host computer as 
The BASIC indicator also shows self-test 



HARDCOPY 

This indicator lights to show that the optional hardcopy printer 
is copying the screen. When the operation is complete, the 
terminal turns the indicator off. The HARDCOPY indicator also 
shows self-test errors. 

LI and L2 

These indicators are turned on and off by the host computer. The 

LI and L2 indicators also show self-test errors. 



3-11 



3.4.2 Audible Indicators 

The VK100 terminal has two audible alarms: a short tone (click) 
and a long tone (beep) . 

Short Tone (click) — The terminal sounds the short tone whenever 
the operator presses a key, with the following exceptions. 

1. SHIFT and CTRL keys do not generate a keyclick, because 
these keys do not transmit codes. These keys only modify 
the codes transmitted by other keys. 

2. No key generates a keyclick if the keyclick parameter is 
turned off in SET-UP mode. 

Long Tone (beep) — The terminal sounds the long tone when one of 
the following conditions occurs. 

1. The terminal enters SET-UP mode. 

2. The terminal receives a bell code from the computer. 

3. The cursor is eight characters away from the right 
margin, and the margin bell parameter is enabled. 

4. The operator enters an incorrect parameter code or 
parameter setting in SET-UP mode. 

3.5 SET-UP MODE DESCRIPTION 

The VK100 terminal contains many features. Some of these features 
help the operator in the daily use of the terminal. Other features 
allow the terminal to talk to many different types of computers 
and computer programs. To change these features to the required 
settings the terminal contains a special mode of operation called 
SET-UP mode. 

In SET-UP mode, the terminal displays the status of each parameter 
stored in the terminal memory individually on the monitor screen. 
Once the parameter code appears, the operator can change the 
parameter setting. Changing the parameter setting causes the 
terminal to operate according to the new setting. The effect is 
the same as turning a switch on or off. 

Enter SET-UP mode by pressing SET-UP. The following events occur. 

1. The monitor screen scrolls down six character lines. 

2. The long tone sounds. 

3. The monitor enters the expanded mode. 

4. A message similar to the following appears at the top 
center of the screen. 

SET-UP TS4 2400 



3-12 



The word SET-UP indicates the terminal is in SET-UP mode. 

The next two characters are the SET-UP parameter code. This code 
represents the SET-UP parameter the operator can change. In this 
case the code is TS and stands for Transmit Speed. 

Immediately following the SET-UP parameter code is its current 
setting (4 in this case) . This parameter setting code changes when 
the parameter setting changes. 

The last four characters in the message are an abbreviation of the 
current parameter setting. The abbreviation in this case is 2400, 
to show that the terminal transmit speed is set for 2400 baud 
(bits per second) . The parameter setting abbreviation varies from 
setting to setting. 

The parameter settings entered in SET-UP mode are not permanent. 
Every time the operator turns terminal power off, the parameter 
settings return to a condition known as default. The default 
conditions reside in two different physical locations in the 
terminal, the default SET-UP switch pack and the read only memory 
(ROM) . 

The default SET-UP switch pack controls the following parameters. 

Transmit (TS) and receive (RS) speed together 

Parity (PE) 

Default character (UK) sets 

Communications interface (CI) 

Power frequency (PF) 

The operator can change the default values for these SET-UP 
parameters while installing the terminal. Refer to section 2.5 for 
the procedure to follow. This chapter discusses the specific 
function and possible settings for each SET-UP parameter. 

All other default SET-UP parameter settings are controlled by the 
read only memory (ROM) in the VK100 terminal. These default 
parameter settings are permanent. For a parameter setting 
different from the default setting, change the setting each time 
terminal power is turned on. 

3.5.1 SET-UP Parameter Summary 

The VK100 terminal contains all the SET-UP parameters listed in 
Table 3-1. The first column in the table lists the SET-UP 
parameters in the order they appear on the monitor screen. The 
second column lists the parameter codes, and the third column 
lists the possible setting codes for each parameter. The next 
column lists the exact message that appears on the screen, and the 
last column briefly describes what the parameter does for that 
setting. 



3-13 



This table serves only as a brief summary of the SET-UP parameters 
and how they affect the VK100 terminal. See the SET-UP Parameter 
Descriptions section of this chapter for a more complete 
description of each parameter. 



Table 3-1 SET-UP Parameter Summary 



SET-UP Para Set Displayed 
Parameter Code Code Message 



Function 



Transmit 


TS 





TS0 


110* + 


Speed 


TS 


1 


TS1 


300 




TS 


2 


TS2 


600 




TS 


3 


TS3 


1200 




TS 


4 


TS4 


2400 




TS 


5 


TS5 


4800 




TS 


6 


TS6 


9600 




TS 


7 


TS7 


19.2 


Receive 
Speed 


RS 
RS 




1 


RS0 
RSI 


110* + 
300 




RS 


2 


RS2 


600 




RS 


3 


RS3 


1200 




RS 


4 


RS4 


2400 




RS 


5 


RS5 


4800 




RS 


6 


RS6 


9600 




RS 


7 


RS7 


19.2 


Local/ 
Line 


LL 
LL 



1 


LL0 

LLl 


Loci 
OnLn* 



Set transmit speed to 110 

baud. 

Set transmit speed to 300 

baud. 

Set transmit speed to 600 

baud. 

Set transmit speed to 1,200 

baud. 

Set transmit speed to 2,400 

baud. 

Set transmit speed to 4,800 

baud. 

Set transmit speed to 9,600 

baud. 

Set transmit speed to 

19,200 baud. 

Set receive speed to 110 

baud. 

Set receive speed to 300 

baud. 

Set receive speed to 600 

baud . 

Set receive speed to 1,200 

baud. 

Set receive speed to 2,400 

baud. 

Set receive speed to 4,800 

baud. 

Set receive speed to 9,600 

baud. 

Set receive speed to 19,200 

baud. 

Local mode. 
On-line mode. 



3-14 



Table 3-1 SET-UP Parameter Summary (cont) 



SET-UP Para Set Displayed 
Parameter Code Code Message 



Function 



BASIC 


BA 
BA 



1 


BA0 
BAl 


Off* 
Loci 




BA 


2 


BA2 


Host 


Parity 
Enable 


PE 
PE 



1 


PE0 
PE1 


Off*+ 
Even 




PE 


2 


PE2 


Odd 


XON/XOFF 


XO 





XO0 


Off 




XO 


1 


X01 


On* 


Scroll 


SM 
SM 

SM 
SM 



1 
2 
3 


SM0 
SMI 
SM2 
SM3 


Off 
Jump 
Smth* 
Wrap 


Reverse 
Video 


RV 
RV 



1 


RV0 
RV1 


Off* 
On 


Horizontal 
Margins 


HM 
HM 



1- 


HM0* 
-9 HM(1 — 9) 



Vertical 
Margins 



VM VM0* 

VM 1 — 9 VM(1 — 9) 



Expansion 


EM 





EM0 Ndrm* 


Mode 


EM 


1 


EMI Expn 


Horizontal 


HP 


0- 


-9 HP(0— 9) 


Position 


HP 


5 


HP5* 



BASIC disabled. 

BASIC enabled in local 

mode. 

BASIC enabled in host mode. 

Parity off, bit 8 set to 

SPACE. 

Even parity on, bit 8 set 

to even parity and checked. 

Odd parity on, bit 8 set to 

odd parity and checked. 

XON/XOFF not sent 
automatically. 
XON/XOFF sent 
automatically. 

No scrolling. 
Jump scroll. 
Smooth scroll. 
Wrap scroll. 

Normal video. 
Reverse video. 

No horizontal margins. 
Horizontal margins one to 
nine characters from left 
and right. 

No vertical margins. 
Vertical margins one to 
nine characters from top 
and bottom. 

Normal display. 

Expanded mode (double-width 

text characters) . 

Horizontal display 

position. 

Normal horizontal display 

position. 



* Indicates the default value of the parameter. 

+ This default value is determined by the settings of the default 
SET-UP switch pack. Refer to Chapter 2 section 2.5 for the 
procedure to change these settings. 



3-15 



Table 3-1 SET-UP Parameter Summary (cont) 



SET-UP 
Parameter 


Para 
Code 


Set 
Code 


Displayed 
Message 


Overstrike 


OS 
OS 




1 


OS0 
0S1 


Off* 
On 


Visual 
Cursor 


VC 
VC 
VC 




1 
2 


VC0 
VC1 
VC2 


Off 

Text 

Grph 




VC 


3 


VC3 


Both* 


Text Display 


TD 





TD0 


Norm* 




TD 


1 


TD1 


Text 



Function 



TD 



TD2 Ctrl 



Normal text replacement. 
Overlay text writing. 

Disable visual cursor. 

Enable text visual cursor. 

Enable graphics visual 

cursor. 

Enable both cursors. 

Normal processing of text 
display. 

Display all characters as 
text (transparency mode) ; 
all characters are 
displayed as text and not 
processed, except LF which 
is displayed as next line. 
Process all characters 
normally, display all 
unrecognized characters as 
text. 



Graphics 
Display 



Graphics 
Prefix 



GD 





GD0 


Norm* 


GD 


1 


GDI 


Text 


GD 


2 


GD2 


Top 


GD 


3 


GD3 


Bot 


GP 





GP0 


Off* 


GP 


1 


GP1 = 


_ ii i n 



S i ng 1 e 


SC 





SC0 


Off* 


Character 












SC 


1 


SCI 


On 


Local Echo 


LE 





LE0 


Off* 




LE 


1 


LEI 


On 


New Line 


NL 





NL0 


Off* 




NL 


1 


NL1 


On 



Normal processing of 

graphics. 

Display graphics commands 

as text. 

Display last line of ReGIS 

at top of screen. 

Display last line of ReGIS 

at bottom of screen. 

Disable graphics prefix 

mode. 

Enable graphics prefix 

mode; character shown in 

quotes is prefix character, 

Normal communications 

operation. 

Single character operation, 

No local echo. 

Local echo every key 

stroke. 

New line mode disabled. 
New line mode enabled. 



3-16 



Table 3-1 SET-UP Parameter Summary (cont) 



SET-UP 
Parameter 


Para 
Code 


Set 
Code 


Displayed 
Message 


Function 


Auto Hard- 
copy 


AH 
AH 



1 


AH0 
AH1 


Off* 
On 


Disable auto hardcopy mode. 
Enable auto hardcopy mode. 


Auto Wrap- 
around 


AW 
AW 



1 


AW0 
AW1 


Off 
On* 


Disable auto wraparound. 
Enable auto wraparound. 


Key Repeat 


KR 
KR 



1 


KR0 
KR1 


Off 
On* 


Disable key repeat 
parameter. 
Enable key repeat 
parameter. 


Keyclick 


KC 
KC 




1 


KC0 
KC1 


Off 
On* 


Disable keyclick. 
Enable keyclick. 


Margin Bell 


MB 
MB 




1 


MB0 
MB1 


Off 
On* 


Disable right margin bell. 
Enable right margin bell. 


Terminal 
Mode 


TM 
TM 




1 


TM0 
TM1 


VT52 
ANSI* 


VT52 mode. 
ANSI mode. 


Keypad 
Mode 


KP 
KP 




1 


KP0 
KP1 


Norm* 
Appl 


Numeric keypad mode. 
Application keypad mode. 


Cursor Key 
Mode 


CK 
CK 



1 


CK0 
CK1 


Norm* 
Appl 


Cursor key mode. 
Cursor key application 
mode. 


Programmed 
Keypad Mode 


PK 
PK 




1 


PK0 
PK1 


Off* 
On 


Programmed keypad disabled. 
Programmed keypad enabled. 


Tablet 
Locator Mode 


TL 
TL 




1 


TL0 
TL1 


Off* 
On 


Only four cursor keys 
control locator mode. 
Tablet or cursor keys 
control locator mode. 


UK Character 
Set 


UK 
UK 




1 


UK0 
UK1 


U.S.* + 
U.K. 


US character set. 
UK character set. 


Comm. 
Interface 


CI 
CI 



1 


CI0 
CI1 


EIA* + 
20 mA 


EIA comm. interface 

selected. 

20 mA comm. interface 

selected. 



* Indicates the default value of the parameter. 

+ This default value is determined by the settings of the default 
SET-UP switch pack. Refer to Chapter 2 section 2.5 for the 
procedure to change these settings. 



3-17 



Table 3-1 SET-UP Parameter Summary (cont) 



SET-UP Para Set Displayed 
Parameter Code Code Message 



Function 



Hardcopy 
Speed 



Power 
Frequency 

Interlace 



Self-Test 



HS 





HS0 


110 


HS 


1 


HS1 


300 


HS 


2 


HS2 


600 


HS 


3 


HS3 


1200 


HS 


4 


HS4 


2400 


HS 


5 


HS5 


4800 


HS 


6 


HS6 


9600* 


HS 


7 


HS7 


19.2 


PF 





PF0 


60 Hz*+ 


PF 


1 


PF1 


50 Hz 


IL 





IL0 


Off* 


IL 


1 


IL1 


On 


ST 


1 


ST1 


PwUp 


ST 


2 


ST2 


Ex Cm 


ST 


3 


ST3 


He Cm 


ST 


4 


ST4 


Dspl 


ST 


5 


ST5 


CBar 


ST 


9 


ST9 


Rept 


ST 





ST0 


Clr 



Set hardcopy speed to 110 

baud. 

Set hardcopy speed to 300 

baud . 

Set hardcopy speed to 600 

baud. 

Set hardcopy speed to 1,200 

baud. 

Set hardcopy speed to 2,400 

baud . 

Set hardcopy speed to 4,800 

baud . 

Set hardcopy speed to 9,600 

baud . 

Set hardcopy speed to 

19,200 baud. 

60 Hz power frequency. 
50 Hz power frequency. 

Interlace turned off. 
Interlace turned on. 

Select power-up self-test. 

Select external comm. test. 

Select hardcopy comm. test. 

Select display pattern 

test. 

Select color bar test 

pattern. 

Repeat selected test(s) 

until failure. 

Clear all selected test(s). 



* Indicates the default value of the parameter. 

+ This default value is determined by the settings of the default 
SET-UP switch pack. Refer to Chapter 2 section 2.5 for the 
procedure to change these settings. 



3-18 



3.5.2 Changing a SET-UP Parameter (Operator) 

To change any or all of the SET-UP parameters perform the 

following simple procedure. 

1. Enter SET-UP mode by pressing SET-UP. 

2. Select the SET-UP parameter you want to change. Use one 
of the four following methods. 

a. Type the two-character SET-UP parameter code on the 
keyboard. 

b. Press RETURN until the SET-UP parameter code appears 
on the screen. This key is pressed, the code advances 
by one. 

c. Press the > key until the SET-UP parameter code 
appears on the screen. Each time this key is pressed, 
the code advances by one. 

d. Press the < key until the SET-UP parameter appears on 
the screen. Each time this key is pressed, the code 
advances by one. 

3. Change the parameter setting. Use one of the four 
following methods. 

a. Type the single-digit parameter setting. This changes 
the parameter setting to the typed-in value without 
stepping through all the possible parameter settings. 

b. Press the SPACE BAR. Each time the SPACE BAR is 
pressed the parameter setting advances to the next 
possible value. 

c. Press the T key. Each time this key is pressed, the 
parameter setting advances to the next possible 
value. 

d. Press the V key. Each time this key is pressed, the 
parameter setting goes back to the previous setting. 

To change more than one SET-UP parameter, just repeat steps 2 and 
3 as often as needed. Pressing either the RETURN or > key advances 
the terminal to the next parameter and displays the new parameter 
and its current setting. Pressing the < key steps the terminal 
back to the previous parameter and displays that parameter and its 
setting. The terminal always returns to the first parameter (TS) 
after stepping through all the parameters. 



3-19 



If the operator presses any keys other than SPACE, RETURN, <, », 
T, V , a parameter code letter, or a parameter value, the terminal 
bell sounds and the last correct parameter or parameter setting 
appears on the screen. 

When all the SET-UP parameters are set, exit the SET-UP mode by 
pressing SET-UP once. The screen then scrolls back to its original 
position and the normal viewing area appears again. 

3.5.3 Changing a SET-UP Parameter (Host Computer) 

The host computer can change all VK100 terminal SET-UP parameters. 
It has this capability because the SET-UP parameters directly 
affect how the terminal acts with specific programs. To change the 
SET-UP parameters, the host computer sends escape sequences to the 
terminal. The terminal then changes the SET-UP parameters and acts 
according to the new settings. 

The Device Control Strings (DCS) section in Chapter 4 describes 
the specific escape sequences and message formats that change the 
terminal SET-UP parameters. 

3.6 SET-UP PARAMETER DESCRIPTIONS 

This section describes each SET-UP parameter in detail and 
explains how each parameter affects the terminal. The SET-UP 
parameters are listed in the order they appear on the screen. 

NOTE 
Unless otherwise stated, entering SET-UP 
mode and changing parameters does not 
result in the loss of data on the 
screen. 

3.6.1 Transmit Speed (TS) 

Set the transmit speed to match the computer receive speed. The 
VK100 terminal can transmit at any one of the following 
preselected speeds: 110, 300, 600, 1,200, 2,400, 4,800, 9,600, and 
19,200 baud. 

Transmit speed is independent of receive speed; the terminal can 
transmit data at one speed and receive data at a different speed. 

Select the default value of both this parameter and the receive 
speed (RS) parameter with the same default SET-UP switch pack 
settings. 

NOTE 
Setting this parameter to 110 baud (TS0) 
selects two stop bits; all other 
settings select one stop bit. 



3-20 



3.6.2 Receive Speed (RS) 

Set the receive speed to match the computer transmit speed. The 
VK100 terminal can receive at any one of the following preselected 
speeds: 110, 300, 600, 1,200, 2,400, 4,800, 9,600 and 19,200 
baud. 

Receive speed is independent of transmit speed; the terminal can 
receive data at one speed and transmit data at a different speed. 

Select the default value of both this parameter and the transmit 
speed (TS) parameter with the same default SET-UP switch pack 
settings. 

3.6.3 Line/Local (LL) 

The line/local parameter allows the operator to enter the terminal 
into either an on-line or a local (off-line) mode. When the 
terminal is on-line (the ON-LINE indicator lights) , all characters 
typed on the keyboard are sent directly to the computer and 
messages from the computer appear on the screen. In local mode 
(the LOCAL indicator lights) , the terminal is disconnected from 
the computer; messages are not sent to or received from the 
computer. Characters typed on the keyboard are echoed directly to 
the screen. 

NOTE 
When the terminal is on-line (LL1) , the 
data terminal ready (DTR) signal on the 
EIA communications line is asserted. 
When the terminal enters local mode 
(LL0) , DTR is deasserted and the LOCAL 
indicator lights. 

3.6.4 BASIC (BA) 

The BASIC mode parameter allows the operator to select the BASIC 
programming capability of the VK100 terminal. If the BASIC mode is 
off (BA0), the terminal operates normally. The line/local 
parameter (LL) determines if the terminal is on-line or local to 
the host computer. 

When the operator selects BASIC local (BA1) , the standard BASIC 
programming capability of the terminal turns on and the terminal 
keyboard acts as the input device to BASIC. In this mode, to enter 
a BASIC program into the terminal type it on the keyboard. The 
BASIC indicator lights when the parameter is set to BA1. 

When the operator selects BASIC host (BA2) , the BASIC programming 
capability of the terminal turns on and the host computer acts as 
the input device to BASIC. In this mode the host computer normally 
loads a BASIC program in the VK100 terminal through the 
communications line. The BASIC indicator lights when the parameter 
is set to BA2. 



3-21 



3.6.5 Parity Enable (PE) 

The parity enable parameter defines the type of parity bit that 
the VK100 terminal generates for transmitted characters and checks 
for received characters. All characters contain eight bits — 
seven data bits and one parity bit. Select the parity bit from one 
of the three following options. 

1. Space parity, which ignores the parity bit for all 
received characters (PE0) 

2. Even parity, with even parity checking for all received 
characters (PE1) 

3. Odd parity, with odd parity checking for all received 
characters (PE2) 

Select the default value of this parameter with the default SET-UP 
switch pack settings. Section 2.5 provides information on how to 
set these switches. 

3.6.6 XON/XOFF (XO) 

The VK100 terminal can automatically generate the synchronizing 
codes XON (DC1) and XOFF (DC3) . The synchronizing codes prevent 
data loss when the host computer sends characters to the terminal 
faster than the terminal can process them. The XOFF control code 
stops data transmission from the host computer to the terminal; 
the XON code signals the host computer to resume transmission. 

When the parameter is on, and the receive buffer contains 100 
unprocessed characters, the VK100 terminal automatically generates 
the XOFF code. The receive buffer fills to that point when one of 
the following events occur. 

1. The operator presses NO SCROLL. 

2. The operator enters the SET-UP mode. 

3. The terminal receives characters faster than it can 
process them. 

The buffer empties only after the operator presses NO SCROLL again 
or takes the terminal out of SET-UP mode. The terminal then takes 
characters out of the buffer and processes them one at a time. 
When 50 characters remain in the buffer, the terminal transmits 
the XON code to resume transmission from the computer to the 
terminal . 

If the XON/XOFF parameter is off, NO SCROLL is disabled. 



If 
data 



the host computer software does not support the XON/XOFF codes, 
a sent during buffer-full conditions may be lost. 



3-22 



NOTE 
The VK100 terminal always stops 
transmission when it receives an XOFF 
(DC3) code and resumes transmission when 
it receives an XON (DC1) code, 
regardless of the auto XON/XOFF 
parameter setting. 

3.6.7 Scroll Mode (SM) 

Scrolling describes the movement of existing lines on the monitor 
screen to make room for new lines on the screen. The scroll mode 
function has four possible settings: scroll off, jump scroll, 
smooth scroll, or wrap scroll. 

In scroll off mode (SM0) , the text cursor always remains on the 
top or bottom line of the display. The display does not move up or 
down. The terminal adds new lines to the screen by writing over 
the top or bottom line. 

In jump scroll mode (SMI) , the text cursor immediately moves to 
the next line. In this mode the existing lines on the screen move 
up or down to make room for new lines. The new lines appear on the 
screen as fast as the computer sends them to the terminal. At the 
higher baud rates, the data is very difficult to read due to the 
rapid movement of the lines. 

NOTE 
Jump scroll mode allows the terminal to 
add a maximum of thirty lines per second 
at the top or bottom of the screen. The 
XON/XOFF parameter must be enabled and 
supported by the host computer to make 
sure that data is not lost when jump 
scroll mode is enabled. 

In smooth scroll mode (SM2) , the terminal receives new lines of 
data at a limited speed. The movement of lines occurs at the 
smooth, steady rate of eight lines per second, allowing the 
operator to read the data as it appears on the screen. 

NOTE 
Smooth scroll mode allows the terminal 
to add a maximum of eight lines per 
second at the top or bottom of the 
screen. The XON/XOFF parameter must be 
enabled and supported by the host 
computer to make sure that data is not 
lost when smooth scroll mode is enabled. 

In wrap scroll mode (SM3) , the terminal adds new lines to the 
screen by writing over the old lines. When the operator reaches 
the end of the screen, (bottom or top) the cursor automatically 
moves to the beginning of the screen, and the terminal writes new 
lines over the old lines on the screen. Existing data on the 
screen does not move. 

3-23 



3.6.8 Reverse Video (RV) 

The reverse video parameter allows the operator to select the 
background of the screen. In normal screen mode (RV0) , the screen 
contains light (or colored) characters on a dark background. In 
reverse screen mode (RV1) , the screen contains dark characters on 
a light (or colored) background. 

3.6.9 Horizontal Margins (HM) 

This parameter allows the operator to tailor the video output of 
the VK100 terminal to the monitor. If the monitor cannot display 
84 characters per line, insert margins on both sides of the 
screen. The width of each margin is in characters. 

If the horizontal margin parameter is set for HM0, the monitor can 
display 84 characters on a line (42 characters if the expansion 
mode parameter is set for EMI) . If the parameter is set for a 
one-character margin (HM1) , both the left and right margins are 
one character wide. This setting allows only 82 characters per 
line (40 characters in EMI) . 

The maximum margin width is nine characters for both the left and 
right margins. This setting provides space for 66 characters per 
line (24 characters in EMI) . 

3.6.10 Vertical Margins (VM) 

This parameter allows the operator to tailor the video output of 
the VK100 terminal to the monitor. If the monitor cannot display 
24 lines of data, insert vertical margins at the top and bottom of 
the screen. The height of each margin is in lines. 

If the vertical margin parameter is set for VM0, the terminal 
sends 24 lines of data to the monitor before scrolling the screen. 
If the parameter is set for VM1, both the top and bottom margins 
are set for one line. This setting allows the terminal to send 22 
lines of data to the monitor before scrolling the screen. 

The maximum margin height is nine lines for both the top and 
bottom margins. This setting allows the terminal to send six lines 
of data to the monitor before scrolling the screen. 

3.6.11 Expansion Mode (EM) 

This parameter allows the operator to expand characters on the 
screen to twice their normal width. In normal mode (EM0), 
characters are seven pixels wide and are spaced two pixels apart. 
In expanded mode (EMI) , characters are 14 pixels wide and are 
spaced 4 pixels apart. 

The EMI setting allows a maximum of 42 characters per line. 

3.6.12 Horizontal Position (HP) 

This parameter allows the operator to tailor the video output of 
the VK100 terminal to the monitor. The horizontal position 
parameter lets the operator center the entire display on the 



3-24 



screen. The normal setting for this parameter is HP5. If the 
display is left of center, increase the value of the parameter 
setting. This moves the entire display to the right. If the 
display is right of center, decrease the parameter setting value. 
This moves the entire display to the left. 

3.6.13 Overstrike (OS) 

This parameter allows the operator to create special graphics on 
the screen by typing over characters. If the overstrike parameter 
is off (OS0) , typing over a character replaces the old character 
with the new character. If the parameter is on (0S1) , typing over 
a character places the new character over the old character 
without destroying the old character. For example, this parameter 
allows you to create the "not equal to" sign (?) by pressing the = 
key, BACKSPACE key, and / key. 

3.6.14 Visual Cursor (VC) 

This parameter allows the operator to change the visual cursor 
displayed. The cursor is the visual indicator that shows the 
active position, where the next character will appear on the 
screen. The text cursor is a solid block character ( ■ ); it only 
appears when the terminal is in text mode. The graphics cursor is 
a diamond cross hair ( <3> ) at the current drawing position; it only 
appears when the terminal is in graphics mode. Only one cursor 
appears on the screen at any one time. 

The visual cursor parameter has four settings. 

In VC0, neither the text cursor nor the graphics cursor appears on 
the screen. 

In VC1, the text cursor appears in text mode, and no cursor 
appears in graphics mode. 

In VC2, no cursor appears in text mode, but the graphics cursor 
appears in graphics mode. 

In VC3, both the text and graphics cursors appear in their 
respective modes. 

3.6.15 Text Display (TD) 

This parameter controls how characters sent to the display are 
processed by the terminal. 

In TD0, normal processing of both text and ReGIS graphics occurs. 

In TD1, all characters appear as graphics text, including all 
control and escape sequences. No normal processing of these 
characters occurs, except for line feed (LF) which causes a 
next-line function. The XON/XOFF codes are still interpreted for 
synchronization, but also appear as graphics text. Control codes 
appear as the proposed ANSI standard two-character mnemonics. 



3-25 



In TD2, normal processing occurs; those control codes which are 
not normally processed appear as graphics text. Unrecognized 
escape and control sequences do not appear. 

3.6.16 Graphics Display (GD) 

This parameter controls how characters sent to the terminal's 
ReGIS interpreter are processed. 

In GD0, normal ReGIS processing occurs. 

In GDI, ReGIS commands appear as text, and no graphics display 
occurs. When the operator enters ReGIS mode while in GDI, the 
message "GON" appears on the screen, and "GOFF" appears when the 
ReGIS string is done. 

In GD2 and GD3, normal processing of ReGIS graphics commands 
occurs. The last line of the ReGIS commands appears as text on the 
top display line (GD2) or bottom display line (GD3) . This line 
appears only when there are no more ReGIS commands to process, or 
when you freeze the display by pressing NO SCROLL. 

3.6.17 Graphics Prefix (GP) 

This parameter allows the terminal to enter graphics mode by 
receiving a single unique character from the host computer. When 
the graphics prefix character parameter is off (GP0) , no graphics 
prefix character operations can occur. When the parameter is on 
(GP1) , the line feed (LF) character followed by the graphics 
prefix character enters the terminal into graphics mode. The 
terminal interprets any characters received after the prefix 
character as graphics data. The next LF character received returns 
the terminal to normal text mode. If the graphics prefix character 
follows the second LF character, the terminal remains in graphics 
mode for the next line. The terminal does not perform a line feed 
function when it receives the second LF character. 

Use the following procedure to set the graphics prefix character. 

1. Enter SET-UP mode and place the graphics prefix character 
parameter on the screen. If the parameter has not been 
set, the default character (!) appears as the prefix 
character. 

2. Press the = key. 

3. Press the key for the prefix character. The prefix 
character may be any one of 95 graphic text characters 
(space thru ~) . 

The graphics prefix character is now set in the terminal. 



3-26 



3.6.18 Single Character (SC) 

When this parameter is on (SCI) , the terminal sends a carriage 
return (CR) character after each code or set of codes generated by 
a single keystroke. The CR character is also sent after a terminal 
report. 

3.6.19 Local Echo (LE) 

When this parameter is on (LEI) , every character sent to the host 
computer is automatically echoed on the screen. The host computer 
does not have to transmit the character back to the terminal. 

If double characters appear on the screen, turn the local echo 
parameter off, since the host computer is echoing characters back 
to the terminal. 

3.6.20 New Line (NL) 

This parameter enables the RETURN key on the terminal to function 
like the RETURN key on an electric typewriter. When the new line 
parameter is on (NL1) , pressing RETURN generates the carriage 
return (CR) and line feed (LF) codes. When the terminal receives a 
LF code, it interprets the code as a carriage return and line 
feed. 

When the parameter is off (NL0) , pressing RETURN generates only 
the CR code; a LF code causes the terminal to perform a line feed 
only. 

If double line feeds occur consistently, turn this parameter off 
since the computer is performing this function. 

3.6.21 Auto Hardcopy (AH) 

This parameter allows the operator to make a continuous hardcopy 
record of all text that appears on the screen. When the auto 
hardcopy parameter is on (AH1) , the printer copies the screen: 

1. Just before the screen is cleared 

2. Each time an entire display of new lines scrolls onto the 
screen. 

3.6.22 Auto Wraparound (AW) 

This parameter determines where the next character will appear on 
the screen after reaching the end of the current line. When the 
auto wraparound parameter is off (AW0) , all characters received 
after reaching the end of the line appear in the last character 
position of that line. For example, take an 84-character line. 
With the parameter off, the eighty-fifth text character received 
appears at the end of the current line and replaces the character 
already located there. This continues until the terminal receives 
a carriage return character. 

When the parameter is on (AW1) , the eighty-fifth text character 
received appears in the first character position on the next line. 



3-27 



3.6.23 Key Repeat (KR) 

This parameter allows a key to automatically repeat when you hold 
the key down for more than 0.5 seconds. The repeat rate speeds up 
to about 30 characters per second when you hold the key down for 
more than 1.5 seconds. The key repeat parameter affects all but 
the following keyboard keys. 

BREAK 

ESC 

NO SCROLL 

SET-UP 

RETURN 

CTRL and any other key 

PF1 to PF4 

SHIFT 

3.6.24 Keyclick (KC) 

The keyclick is a tone generated every time the operator presses a 
key. The keyclick may be turned on or off to suit the operator's 
needs. However, research and experience have shown that an 
operator is more accurate when there is an audible feedback from 
the keyboard. 

The keyclick volume is not adjustable. 

3.6.25 Margin Bell (MB) 

This parameter acts like the bell in a typewriter. When the 
margin bell parameter is on (MB1) , the VK100 terminal sounds a 
tone to alert the operator that the cursor is nine characters from 
the end of the current line. 

3.6.26 Terminal Mode (TM) 

The VK100 terminal follows two different programming standards — 
American National Standards Institute (ANSI) and VT52. In ANSI 
mode (TM1) , the VK100 terminal generates and responds to coded 
sequences per ANSI standards X3. 41-1974 and X3. 64-1977. In VT52 
mode (TM0) , the VK100 terminal is compatible with previous DIGITAL 
software used on the VT52 video terminal. Chapter 4 summarizes 
both ANSI and VT52 modes. 

3.6.27 Keypad Mode (KP) 

In normal (numeric) mode (KP0) , the auxiliary keypad keys transmit 
the ASCII codes for the characters engraved on the keycaps, (for 
example to 9). The ENTER key acts like the RETURN key on the 
main keyboard. In application mode (KP1) , these keys transmit 
unique escape sequences. Chapter 4 provides the exact escape 
sequences. 

3.6.28 Cursor Key Mode (CK) 

In normal (cursor) mode (CK0) , the four cursor keys send the ANSI 
cursor movement escape sequences. In application mode (CK1) , the 
cursor keys transmit unique control sequences. Chapter 4 provides 
the exact escape sequences. In VT52 mode (TM0) , this parameter has 
no effect; the four cursor keys send the codes listed in Table 
4-1. 

3-28 



3.6.29 Programmed Keypad Mode (PK) 

The VK100 terminal can be programmed to send special sequences for 
any or all of the auxiliary keypad keys. When the programmable 
keypad parameter is on (PK1) , keys that are programmed to send 
special code sequences send those sequences. Keys not programmed 
are not affected. If the parameter is off (PK0) , all cursor and 
auxiliary keypad keys transmit their normal sequences as selected 
by the TM, KP, and CK parameters. 

3.6.30 Tablet Locator Mode (TL) 

This parameter defines how to move the locator mode cross-hair 
cursor. When the parameter is off (TL0) , move the cross-hair 
cursor by pressing one of the four arrow keys on the keyboard. The 
cross-hair cursor moves in the direction of the arrow on the key. 

When this parameter is on (TL1) , an optional tablet pen or cursor 
positions the cross-hair cursor. 

The optional tablet connects to the VK100 terminal at the Hardcopy 
connector. When the tablet is connected, the terminal cannot be 
connected to a printer. 

3.6.31 United Kingdom Character Set (UK) 

The VK100 terminal contains two different character sets: the 
United States ASCII character set and the UK (United Kingdom) 
character set. The difference between the two sets is one 
character, the # or fa sign. When this parameter is on (UK1) , the 
UK pound sign fa appears instead of the # sign. 

Setting this parameter does not immediately change the character 
that appears on the screen. To obtain the desired character set 
reset the terminal. 

The default SET-UP switch pack settings determine the default 
value of this parameter. Section 2.5 of Chapter 2 provides 
information on how to set these switches. 

3.6.32 Communications Interface (CI) 

This parameter selects the communications interface (EIA or 20 mA 
current loop) used to connect the terminal to the host computer. A 
parameter setting of CI0 selects EIA communications. CI1 selects 
the 20 mA communications. This parameter must be set correctly for 
the VK100 terminal to communicate with the host computer. 

The default SET-UP switch pack settings determine the default 
value of this parameter. Section 2.5 of Chapter 2 provides 
information on how to set these switches. 

3.6.33 Hardcopy Speed (HS) 

Set the hardcopy speed to match the hardcopy printer's transmit 
and receive speed. The VK100 terminal can transmit data to the 
hardcopy printer at any one of the following preselected speeds: 
110, 300, 600, 1,200, 2,400, 4,800, 9,600 and 19,200 baud. 



3-29 



3.6.34 Power Frequency (PF) 

This parameter matches the terminal's video output signals to the 
monitor characteristics affected by the power line frequency. 
During the terminal installation, set this parameter for the power 
line frequency, 50 or 60 Hertz. In the US, the correct setting is 
60 Hertz (PF0) . 

The default SET-UP switch pack settings determine the default 
value of this parameter. Section 2.5 of Chapter 2 provides 
information on how to set these switches. 

3.6.35 Interlace (IL) 

Interlace describes a method of displaying characters on the 
screen. When the interlace parameter is on, every other scan line 
(row of horizontal dots) appears on the screen. After a complete 
scan of the screen, the terminal returns to start and scans the 
lines that were skipped. When the parameter is off, every scan 
line appears on the screen in order. 

Using the interlace parameter with a monitor that does not need an 
interlaced video input causes the screen to flicker. When using 
the Barco Model GD33 monitor with the VK100 terminal, turn the 
interlace parameter off (IL0) . 

3.6.36 Self-Test (ST) 

This parameter selects the internal test programs the terminal 
performs. The following programs are available. 

Clear all selected test(s) (0) 

Power-up test (1) 

External communications test (2) 

Hardcopy communications test (3) 

Display pattern test (4) 

Color bar test pattern (5) 

Repeat the selected test(s) until failure (9) 

The self-test parameter allows the operator to select more than 
one test program. To do this type the number of each test program 
to be run. The terminal performs the test(s) after exiting SET-UP 
mode by pressing SET-UP. 



3-30 



CHAPTER 4 
PROGRAMMING SUMMARY 



4.1 INTRODUCTION 

This chapter summarizes the programming characteristics of the 
VK100 terminal. The summary covers the following topics. 

Codes generated by the keyboard 

Character sets 

Terminal actions to control sequences in both ANSI and VT52 
modes 

ReGIS command structure 

BASIC command structure 

4.2 KEYBOARD CODES 

The following paragraphs describe the codes generated by the VK100 
terminal keyboard. 

4.2.1 Standard Key Codes 

The VK100 terminal keyboard resembles a standard office 
typewriter. In addition to the standard typewriter keys, the 
terminal has keys to generate control functions and cursor control 
commands. Figure 4-1 shows the VK100 terminal keyboard layout and 
the ASCII codes generated by each key. 

4.2.2 Cursor Control Key Codes 

The VK100 terminal's main keyboard contains four cursor control 
keys. Table 4-1 lists all the possible codes generated by these 
keys. The operator selects the ANSI/VT52 mode with the terminal 
mode (TM) SET-UP feature, and the cursor key application mode with 
the set mode (SM) and reset mode (RM) control functions. 



4-1 









OCTAL CODES GENERATED BY KEYBOARD 
(SHIFTED CODES SHOWN ABOVE LEGENDS; 




































033 
ESC 
033 


041 
1 ! 
061 


100 
2@ 
062 


043 
3# 
063 


044 
4$ 
064 


045 
5% 
065 


136 
6 A 
066 


046 
7& 
067 


052 
8 * 
070 


050 
9| 
071 


051 
0) 
060 


137 
055 


153 
= + 
076 


176 010 

. BACK 
\ ~ SPACE 

140 010 






011 
TAB 

011 




127 
W 

167 


105 

E 
145 


122 

R 
162 


124 
T 
164 


131 

Y 

171 


125 

U 

165 


111 

I 
151 


117 



157 


120 

P 
160 


173 

[I 
133 


175 

II 
135 




177 

DELETE 

177 








101 
A 
141 


123 

S 

163 


104 

D 
144 


106 

F 
146 


107 

G 

147 


110 

H 

150 


112 

J 

152 


113 

K 
153 


114 

L 
154 


072 
073 


042 
047 


015 

RETURN 
015 


174 

\| 
134 
























132 

z 

172 


130 
X 

170 


103 
C 

143 


126 
V 
166 


102 
B 

142 


116 
N 
156 


115 
M 
155 


074 
, < 

054 


076 
> 

056 


077 

/? 
057 




012 

LINE 
FEED 

012 
















040 
040 















Figure 4-1 Keyboard-Generated ASCII Codes 



Table 4-1 Cursor Control Key Codes 



Cursor Key VT52 
(Arrow) Mode 



ANSI Mode/Cursor 
Key Mode Reset 



ANSI Mode/Cursor 
Key Mode Set 
(Application) 



Up 

Down 
Right 
Left 



ESC A 
ESC B 
ESC C 
ESC D 



ESC [ A 

ESB [ B 

ESC [ C 

ESC [ D 



ESC A 
ESC B 
ESC C 
ESC D 



4-2 



4.2.3 Auxiliary Keypad Codes 

The VK100 terminal contains an auxiliary or numeric keypad to the 
right of the main keyboard. Table 4-2 shows all the possible codes 
generated by the numeric keys. Table 4-3 shows all the possible 
codes generated by the program function (PF) keys. The operator 
selects the ANSI/VT52 mode with the terminal mode (TM) SET-UP 
feature, and the keypad applications mode with the set mode (SM) 
and reset mode (RM) control functions. 



Table 4-2 Auxiliary Keypad Numeric Key Codes 

Keypad Numeric Keypad Application Mode 

Key Mode ANSI VT52 



1 1 

2 2 

3 3 

4 4 

5 5 

6 6 

7 7 

8 8 

9 9 



ENTER Same as RETURN 



ESC 





p 


ESC 


7 


P 


ESC 





q 


ESC 


7 


q 


ESC 





r 


ESC 


? 


r 


ESC 





s 


ESC 


? 


s 


ESC 





t 


ESC 


■? 


t 


ESC 





u 


ESC 


7 


u 


ESC 





V 


ESC 


7 


V 


ESC 





w 


ESC 


7 


w 


ESC 





X 


ESC 


? 


X 


ESC 





y 


ESC 


7 


y 


ESC 





m 


ESC 


7 


m 


ESC 





1 


ESC 


7 


1 


ESC 





n 


ESC 


7 


n 


ESC 





M 


ESC 


7 


M 



Table 4-3 Auxiliary Keypad PF Key Codes 



Keypad Numeric Mode/ 
Keypad Application Mode 
Key ANSI VT52 

PF1/HARDC0PY ESC P ESC ? P 

PF2/L0CTR ESC Q ESC ? Q 

PF3/TEXT ESC R ESC ? R 

PF4/RESET ESC S ESC ? S 



4-3 



4.2.4 Control Characters 

The VK100 terminal generates and supports certain control 
characters. Figure 4-2 shows the control characters generated by 
the terminal keyboard. Table 4-4 lists the control characters 
supported by the VK100 terminal, and the action the terminal takes 
when it receives each control character. The terminal ignores 
control characters that it does not support. 



OCTAL REPRESENTATION OF CODES 
GENERATED BY KEYBOARD WITH CTRL 
KEY HELD DOWN (MNEMONICS SHOWN 













BELOW LEGENDS.) 




































ESC 
ESC 
033 


























RS BS 

\ _ BACK 
* SPACE 

036 010 






HT 
TAB 
011 


XON 

Q 
021 


ETB 

W 
027 


ENQ 

E 
005 


DC2 

R 
022 


DC4 

T 
024 


EM 

Y 

031 


NAK 

U 
025 


HT 

I 

011 


SI 



017 


I DLE I 
P 

I 020 I 


ESC I 

'I 
033 I 


GS 1 

n 

035 I 




DEL 

DELETE 
177 








SOH 

A 
001 


XOFF 

S 
023 


EOT 
D 

004 


ACK 

F 
006 


BEL 

G 
007 


BS 

H 
010 


LF 

J 

012 


VT 

K 

013 


FF 

L 

014 






CR 

RETURN 
015 


FS 

M 
034 






















































SUB 

Z 
032 


CAN 

X 
030 


ETX 
C 

003 


SYN 

V 
026 


STX 

B 
002 


SO 

N 
016 


CR 
M 
015 


, < 


> 


US 
/? 
037 




LF 

LINE 
FEED 
012 
















NUL 
000 


I 













Figure 4-2 Keyboard-Generated Control Codes 



4-4 



Table 4-4 Terminal-Supported Control Character Functions 



Control Code 



Octal Code 



Terminal Action 



BEL 
BS 

HT 



LF 



FF 



CR 



SO 



CAN 



SUB 
ESC 



007 
010 

011 



012 



014 



015 



016 



SI 


017 


DCl(XON) 


021 


DC 3 (XOFF) 


023 



030 



032 
033 



Ring the terminal bell. 

Backspace the cursor by one 
position; if at left margin, then 
no operation. 

Horizontal tab; move the cursor to 
next fixed tab position (fixed at 
eight character intervals) . The 
cursor will not move if at right 
margin. 

Line feed; move cursor to next 
line down. If at bottom margin, 
the cursor position remains 
unchanged. If new line mode is 
enabled, perform carriage return 
function. 

Form feed; clear screen and move 
cursor to home position (upper 
left corner) . 

Carriage return; move cursor to 
left margin. 

Shift out; invoke Gl character 
set. 

Shift in; invoke G0 character set. 

Allows terminal to resume 
transmitting . 

Causes terminal to stop 
transmitting all characters except 
XOFF and XON. 

If sent during an escape sequence 
the sequence is immediately 
terminated and not executed. 
Causes the error character ( $ ) to 
be displayed. 

Same effect as CAN. 

Subsequent character(s) are 
interpreted as part of an escape 
sequence. 



4-5 



4.3 CHARACTER SETS 

The VK100 terminal can contain up to five character sets. 

1. United Kingdom (UK) 

2. United States (USASCII) 

3. Soft character set 1 

4. Soft character set 2 

5. Soft character set 3 

The soft character sets 1 through 3 are the same character sets 
referenced in the ReGIS mode of operation. The contents of these 
character sets can be specified to meet specific requirements. The 
character sets are loaded by using the ReGIS L command. (See the 
ReGIS command summary in section 4.4.3.) 

Using multiple character sets in the VK100 terminal is a simple, 
two-step operation. Simply define the active character sets and 
select one of those sets for use. 

From the five character sets select one or two active character 
sets. This is done with the select character set (SCS) control 
sequence. The SCS control sequence defines the active character 
sets as G0 and Gl. Table 4-5 summarizes the SCS control sequences. 
It lists the exact sequence needed to define any character set as 
G0 or Gl. 



Table 4-5 Select Character Set Sequences 



Character Set G0 Gl 



UK 




ESC 


( A 


ESC 


) 


A 


US ASCII 




ESC 


( B 


ESC 


) 


B 


Soft Set 


1 


ESC 


( 


ESC 


) 





Soft Set 


2 


ESC 


( 1 


ESC 


) 


1 


Soft Set 


3 


ESC 


( 2 


ESC 


) 


2 



4-6 



The shift in (SI) and shift out (SO) control characters select the 
actual character set used. When the terminal receives the shift in 
(SI, 017 fi ) control character, the character set defined as G0 by 
the SCS control sequence becomes the active character set. The 
shift out (SO, 016 g ) control character activates the character set 
defined as Gl by the SCS control sequence. The following examples 
show how the multiple character sets are used. 

Example 1 

You want to use the United States character set and soft character 
set 3 in the terminal. To select these two character sets as the 
active character sets, the host computer sends the following 
control sequences to the terminal. 

ESC ( B To define the United States character set as G0 

ESC ) 2 To define soft character set 3 as Gl 

The shift in and shift out control characters then control the 
selection of the active character sets. Shift in (SI, 017 R ) 
selects the US character set and shift out (SO, 016 R ) selects soft 
character set 3. 

Example 2 

You want to use soft character set 1 and the United States 
character set in the terminal. To define these two character sets 
as the active character sets, the host computer sends the 
following control sequences to the terminal. 

ESC ( To define soft character set 1 as G0 

ESC ) B To define the United States character set as Gl 

The shift in and shift out control characters then control the 
selection of the active character set. Shift in (SI, 017 ft ) selects 
soft character set 1, and shift out (SO, 016 fi ) selects the US 
character set. ° 

As the two examples show, any character set can be defined as G0 
and any other character set as Gl. In those cases only one 
character set is used, it can be defined as both G0 and Gl. 

At either power-up or master reset, the terminal defines the 
default character set as both G0 and Gl. The default SET-UP switch 
pack selects the specific default character set. See Chapter 2 
section 2.5 for information on changing the default character set. 



4-7 



4.4 CONTROL FUNCTIONS 

The VK100 terminal is an upward and downward software compatible 
terminal. Previous DIGITAL terminals have DIGITAL private 
standards for control sequences. The American National Standards 
Institute (ANSI) has since standardized control sequences in 
terminals. The VK100 terminal is compatible with both the previous 
DIGITAL standards and current ANSI standards. 

NOTE 
The ANSI standards allow the 
manufacturer flexibility in implementing 
each function. This manual describes how 
the VK100 terminal responds to the 
implemented ANSI control functions. 

Customers may use existing DIGITAL software designed around the 
VT52, or new VK100 terminal software designed to meet ANSI 
standards. The VK100 terminal has a "VT52 compatible" mode in 
which the VK100 terminal responds to control sequences like a 
VT52. In this mode, the operator cannot use many VK100 terminal 
features. 

Throughout this chapter references are made to "VT52 mode" or 
"ANSI mode". These two terms indicate the VK100 terminal's 
software compatibility. All new software should be designed around 
the VK100 terminal's ANSI mode. The VT52 mode is included only to 
provide continuity for existing operating systems support. 

The following paragraphs briefly summarize the control sequences 
implemented by the VK100 terminal. The GIGI ReGIS Handbook , 
AA-K366A-TK, contains detailed descriptions oJ the control 
sequences and the action they perform. 

The following ANSI standards were used in implementing the VK100 
terminal. 

X3. 16-1976 Character Structure and Character Parity Sense 

X3. 4-1977 USA Standard Code for Information Interchange 

(ASCII) 

X3. 41-1974 Code Extension Techniques for Use with ASCII 

X3. 64-1977 Addition Controls for Use with ASCII 

The VK100 terminal implements a subset of these standards. 



4-8 



In the list of control functions in this chapter, the characters 
are shown using the ASCII character set. The case (upper or lower) 
of the characters sent is significant and must be sent exactly as 
documented. These characters are spaced apart for clarity only. 
The SPACE character (040 ) never appears in any of the VK100 
terminal's recognizable control or escape sequences. The ESCAPE 
character (033 ) is defined as ESC. All graphics characters shown 
in bold are integral to the control or escape sequence. Characters 
not in bold indicate variable parameters (Ps and Pn) or a possible 
sequence of parameters (...). Where a variable parameter is 
indicated, the possible values appear immediately after the 
sequence. 

4.4.1 ANSI Control Functions Summary 

The following escape and control sequences are transmitted from 
the host computer to the VK100 terminal unless otherwise noted. 
The control sequences are listed according to the generic function 
they perform. 



Function 

Cursor up 

Cursor down 

Cursor forward (right) 

Cursor backward (left) 

Direct cursor addressing 

Index 

New line 

Reverse index 

Save cursor and attributes 

Restore cursor and attributes 



4.4.1. 


1 


Cursor 1 


Sequence 




ESC [ 


Pn 


A* 


ESC [ 


Pn 


B* 


ESC [ 


Pn 


C* 


ESC [ 


Pn 


D* 


ESC [ 


PI 


; Pc H+ 


ESC [ 


PI 


; Pc f 


ESC D 






ESC E 






ESC M 






ESC 7 






ESC 8 







* Pn is a decimal number expressed as a string of ASCII digits. 
Multiple parameters are separated by the semicolon character 
(073 ) . If a parameter is omitted or specified as 0, the default 
parameter value is used. For the cursor movement commands, the 
default parameter value is 1. 

+ PI equals the line number; Pc equals the column number. 



4-9 



4.4.1.2 Character Attributes 
ESC [ Ps ; Ps; Ps ;...; Ps m 

Ps is a selective parameter. Multiple parameters are separated by 
the semicolon character (073„) . The parameters execute in order 
and have the following functions. 



Parameter 


Function 











or 


none 


Exit gra 


phic mode 


and 


select writing color 








(same as 


SHIFT/PF3) 




2 






Half bri 


ght (or g: 


reen) 




4 






Underscore on 






5 






Blink on 








7 






Reverse 


video on 






30 






Black 








31 






Red 








32 






Green 








33 






Yellow 






writing colors 


34 






Blue 








35 






Magenta 








36 






Cyan 








37 






White 








40 






Black 








41 






Red 






screen colors 


42 






Green 








43 






Yellow 








44 






Blue 








45 






Magenta 








46 






Cyan 








47 






White 









Any other parameter values are ignored. 

4.4.1.3 Erasing Commands 

Function 

From cursor to end of line 

From beginning of line to cursor 
Entire line containing cursor 
From cursor to end of screen 

From beginning of screen to cursor 
Entire screen 

4.4.1.4 Programmable Indicators 
ESC [ Ps ; Ps ; . . . Ps q 

Ps is a selective parameter. Multiple parameters are separated by 
the semicolon character (073 R ) . The parameters execute in order 
and have the following functions. 



4-10 



Sequence 


ESC [ 


K 


or 


ESC [ 





K 


ESC [ 


1 


K 


ESC [ 


2 


K 


ESC [ 


J 


or 


ESC [ 





J 


ESC [ 


1 


J 


ESC [ 


2 


J 



Parameter 



Function 



or none 

1 

2 



All indicators off 
Indicator 1 on 
Indicator 2 on 



4.4.1.5 Select Character Sets (SCS) 



Character Set 



UK 

US ASCII 
Soft set 1 
Soft set 2 
Soft set 3 



4.4.1.6 Enter Graphics Mode 
Sequence Function 



Sequence 








G0 


Gl 






ESC ( A 


ESC 


) 


A 


ESC ( B 


ESC 


) 


B 


ESC ( 


ESC 


) 





ESC ( 1 


ESC 


) 


1 


ESC ( 2 


ESC 


) 


2 



ESC Pp 



Line Feed (LF) ! 



Enter and remain in graphics mode until 
next escape sequence 

Enter and remain in graphics mode until 

next line feed character if GP1 is selected 



4.4.1.7 Modes 

SET-UP parameters are affected by these modes. 







To Set 








To Reset 








SET-UP 
























Para 


Mode Name 


Mode 


Sequence 


Mode 


Sequence 


NL 


Line Feed/ 


New Line 


ESC 


[ 


20 h 


Line Feed 


ESC 


[ 


20 1* 




New Line 






















CK 


Cursor Key 


Appl 


ESC 


[ 


? 


1 h 


Cursor 


ESC 


[ 


? 


1 1* 


TM 


ANSI/VT52 


ANSI 


n/a 








VT52 


ESC 


[ 


? 


2 1* 


SM 


Scrolling 


Smooth 


ESC 


[ 


? 


4 h 


JUMP 


ESC 


[ 


? 


4 1* 


RV 


Screen 


Reverse 


ESC 


[ 


? 


5 h 


Normal 


ESC 


[ 


? 


5 1* 


AW 


Auto Wrap- 
























around 


On 


ESC 


[ 


• 


7 h 


Off 


ESC 


t 


• 


7 1* 


AR 


Auto Repeat 


On 


ESC 


[ 


? 


8 h 


Off 


ESC 


[ 


? 


8 1* 


OS 


Overstrike 


On 


ESC 


[ 


? 


20 h 


Off 


ESC 


[ 


? 


20 1* 


BA 


Local BASIC 


Local 


ESC 


[ 


? 


21 h 


BASIC Off 


ESC 


[ 


? 


21 1* 


BA 


Host BASIC 


Host 


ESC 


[ 


? 


22 h 


BASIC Off 


ESC 


[ 


? 


22 1* 


PK 


Programmed 
Keypad 


Program- 
med 


ESC 


[ 


? 


23 h 


Normal 


ESC 


[ 


? 


23 1* 


AH 


Auto 
Hardcopy 


On 


ESC 


[ 


? 


24 h 


Off 


ESC 


[ 


? 


24 1* 


KP 


Keypad 


Appl 


ESC 


ss 






Numeric 


ESC 


> 







* The last character of the sequence is a lowercase 1 (154 Q ) . 

8 



4-11 



4.4.1.8 Reports 

There are three types of reports with the following escape and 

control sequences. 

Cursor Position Report 

Invoked by: ESC [ 6 n 
Response is: ESC [ Pi ; Pc R 

Pi equals the line number; Pc equals the column number. 

Status Report 

Invoked by: ESC [ 5 n 

Response is: ESC [ n (terminal ok) 

What Are You 

Invoked by: ESC [ c or ESC [ c 
Response is: ESC [ ? 5 ; c or 

ESC [ ? 5 c 

(Meaning: I am GIGI terminal.) 

Alternately invoked by ESC Z (not recommended) . Response is the 
same. 

4.4.1.9 Reset 

ESC c 

Reset executes the reset routine. The SET-UP parameters, BASIC 
program, and soft character sets are not destroyed. This is the 
same as pressing SHIFT and PF4. 

4.4.1.10 Print Commands 

Sequence Function 

ESC f 7 Print display image (same as pressing 

SHIFT and PF1.) 
ESC [ Pn ; Pn !q Print partial image 

Pn is a numeric parameter; these parameters specify start and stop 
line numbers inclusive. 

4.4.1.11 Confidence Tests 

Sequence Function 

ESC # 8 Generate Crosshatch pattern on display 

ESC [ 3 ; Pn ;...y Perform self-tests 



4-12 



Pn selects the test to be performed as follows. 

Pn Test Selected 

1 All power-up tests 

2 External communications test 

3 Hardcopy communications test 

4 Display pattern test 

5 Color bar test 

9 Repeat selected tests until failure 

4.4.1.12 Device Control Strings 

Sequence Function 

ESC P p (host to terminal) ReGIS data to follow 

ESC P r (host to terminal) SET-UP data to follow 

ESC P key ID code s Auxiliary keypad data to follow 

(host to terminal) 

ESC P q (terminal to printer) Hardcopy data to follow* 

ESC \ String terminator 



* This string is generated by the VK100 terminal and sent to the 
LA34VA graphics printer. The VK100 terminal does not process the 
string . 

All device control strings must be terminated with a string 
terminator. For example: 

ESC P r ... SET-UP data ... ESC \ 

4.4.2 VT52 Control Functions Summary 

Function 

Cursor up 

Cursor down 

Cursor right 

Cursor left 

Select soft character set 1 

Select ASCII character set 

Cursor to home 

Reverse line feed 

Erase to end of screen 

Erase to end of line 

Direct cursor address 

* 1 equals line number, c equals column number. Line and columr 
numbers for direct cursor address are single character codes 
whose values equal the desired number plus 37 . Line and column 
numbers start at 1. 



Sequence 


ESC 


A 


ESC 


B 


ESC 


C 


ESC 


D 


ESC 


F 


ESC 


G 


ESC 


H 


ESC 


I 


ESC 


J 


ESC 


K 


ESC 


Ylc* 



4-13 



Sequence 



Function 



ESC 


z+ 


ESC 


= 


ESC 


> 


ESC 


< 


ESC 


] 


ESC 


Pp 


ESC 


\ 



Response to ESC Z 
Are You report in 



is ESC / Z. 

ANSI mode. 



Identify 

Enter alternate keypad mode 

Exit alternate keypad mode 

Enter ANSI mode 

Dump hardcopy 

Enter graphics mode (ReGIS) 

Exit graphics mode 

This is not recommended; use What 



4.4.3 ReGIS Summary 

The following summary of ReGIS commands serves as a quick 
reference guide. Refer to the software documentation for more 
information on any command or command argument. Chapter 1 provides 
a complete list of all the documentation available along with 
ordering information. 



ReGIS Commands 


(gra 


Command 






S creen 


d 






tx, 


y] 




[dx 


,dy] 




(W 

(E 


) 
rase) 



(graphics mode only) 



(Addressing [xl,yl] [x2,y2]) 

(A ddressing) 

(N egate 1) 
(N egate 0) 

(T ime nnn) 

(H ardcopy [,Y1] [,Y2]) 

(I ntensity 

to 7) 
(D)) dark 
(B lue)) 
(R ed)) 
(M agenta) ) 
(G reen) ) 
(C yan)) 



Function 

Screen scroll offset, 

quantified to [12,8]. 

Move this address to 

upper left corner. 

Scoll screen by this 

amount. 

Writing controls. 

Clear data and set 

foreground color. 

Compatibility with 

other ReGIS devices. 

Restore native 

addressing . 

Reverse video. 

Restore video to normal 

mode . 

In 60ths (PF0) or 50ths 

(PF1) of a second. 

Print hardcopy between 

Y coordinates. 

Screen background 

intensity/color . 

Dark to bright. 



Red + blue. 
Green + blue. 



4-14 



Command 



Function 



W rite 



(Y 


ellow) ) 


(W 


hite)) 


(H 


ue 




to 360)) 


(L 


ightness 




to 100)) 


(S 


aturation 




to 100)) 



(I ntensity 





t 


:o 7) 




(D)) dark 




(B 


lue)) 




(R 


ed)) 




(M 


agenta) ) 




(G 


reen) ) 




(C 


yan) ) 




(Y 


ellow) ) 




(W 


hite)) 




(H 


ue 
to 100)) 




(L 


ightness 
to 100)) 




(S 


aturation 
to 100)) 


(A 


lternate 




1) 






0) 




(S 


hade from [ , Y] ) 


(S 


hade with "c") 


(S 


hade 




1) 





0) 

(M ultiplier nnn) 

(N egate 
1) 

0) 

(C omplement) 

(oV erlay) 

(E rase) 
(R eplace) 



Red + green. 

Red + green + blue. 

Angle on color wheel. 

Percentage. 

Percentage. 

Writing intensity/color 
null; change colors. 
Dark to bright. 

Red + blue. 

Green + blue. 

Red + green. 

Red + green + blue. 

Angle on color wheel. 

Percentage. 

Percentage. 

Flashing on. 
Flashing off. 
Set shading axis. 
Set shading character. 

Shade on, line pattern 

shading. 

Shade off. 

Pixels per offset 

vector. 

Negative writing (invert 
pattern bits) . 
Positive writing. 
Exclusive OR pattern 
with bit map. 
Logical OR pattern 
with bit map. 
Write "negate" setting. 
Replace, ignore bit map 
data . 



4-15 



Command 



Function 



(P attern 
bbbbbb) 

(Md)) 

1) 
P) 



P osition [X,Y] 

[dx,dy] 
d 

(W ) 

(B egin) 



(E nd) 

V ector [ ] 

[X,Y] 

[dx,dy] 

d 

(W...) 

(B egin) 

(E nd) 



C urve [X,Y] 

[dx f dy] 

d 

(B egin) 

(S tart) 

(E nd) 

(W... ) 



C ircle [X,Y] 

[dx,dy] 

d 

(C ircumference) 

(A ngle d) 

(W... ) 



Binary bit pattern, 

fills to 8 places. 

Multiply each bit 

pattern. 

Solid line. 

Digits 2 — 9 specify 

standard patterns. 

Absolute position. 
Relative position, 
d is offset vector, 
— 7. 

Temporary write 
controls. 
Begin position 
sequence -- save 
position 

(up to 7 levels) . 
End and restore 
starting position. 

Write point at 

current cursor position. 

Absolute position. 

Relative position, 

d is offset vector, 

0—7. 

Temporary write 

controls. 

Begin closed polygon 

sequence. 

Draw to starting 

position. 

Absolute coordinates 
Relative coordinates 
Offset vectors, — 7. 
Begin closed curve. 
Start open curve. 
End curve. 
Temporary writing 
controls. 

Absolute coordinates. 

Relative coordinates, 

offset vectors, — 7. 

Position is on the 

circumference. 

d = degrees resolution, 

signed. 

Temporary writing 

controls. 



4-16 



Command 

T ext 'string' 

"string" 



[dx,dy] 



Function 

Display 'string' 

(includes BS, CR, LF, 

TAB) . 

Display "string" 

(includes BS, CR, LF, 

TAB) . 

Offset text line by 

1/2 character, d = 

0--7. 

Set spacing between 

characters. 



L oad 



(A lphabet 
to 3) 

(B egin) 



(D irection d) 

(E nd) 

(H eight 

to 16) 



(I talic 

+ degrees) 

- degrees) 

0) 
(M ultiplier [r,c] ) 



(S ize [r ,c] ) 



(S ize 

to 16) 



(W... ) 

(A lphabet 
1 to 3) 

'name' ) 



'c" <10 hex pairs > 



Select character set 

to 3. 

Begin temporary text 

attributes 

(saves 1 level) . 

d = 45 degrees 

resolution, signed. 

Restore permanent text 

attributes. 

Height times base 
character size 
(affects S[r ,c] ) . 

Right slant, no. of 

degrees. 

Left slant, no. of 

degrees. 

No slant. 

No. of times to repeat 

bits in character. 

([1,2] used for standard 

size. ) 

Dimensions of character 

area. [9,20] is standard 

size. ) 

Select one of 17 

predefined character 

sizes. 

Temporary writing 

controls. 

Select character set 1 

to 3. 

1 to 10 character name 

for character set; 

see R (L) . 

Load specific letter 

with pattern. 



4-17 



Command Function 

'c' <10 hex pairs > Load specific letter 

with pattern. 
@ letter Invoke macrograph 

"letter". 

:1 etter ... @; Load macrograph 

"letter". 
Clear all macrographs, 

R eport (L oaded) Currently loaded 

character set name. 
(M aerographs 

(letter ,... )) Report contents of 

macrograph "letter". 
(=) ) Report macrograph 



(P osition) 



(I interactive) ) 



space usage. 



Current position. 



Enter locator mode. 
[+dx,+dy])) Arrow increments. 

(M aerographs 

(letter)) Report contents of 

macrograph 1. 
(=) ) Report macrograph space 

usage. 

; Resynchronization 

character. 

Offset vectors are: 3 2 1 

4*0 
5 6 7 

To initialize ReGIS: ;S (I N A) W (V I 7A S M 1 N P 1 

M 2) T (I A D S 1) P[0,0] 



4-18 



4.4.4 BASIC SUMMARY 

The following summary of the BASIC commands serves as a quick 
reference guide. Refer to the software documentation for more 
information on any command or command argument. Chapter 1 provides 
a complete list of all the documentation available along with 
ordering information. 

4.4.4.1 Commands/Statements 



AUTO 




CLEAR 


CONT 




CTRLC 


CTRLO 




DATA 


DEF FN 




DELETE 


DIM 




ECHO 


EDIT 




END 


ERASE 




ERL 


ERR 




ERROR 


FOR. ..NEXT 




GOSUB... RETURN 


GOTO 




HOST 


IF... THEN [. , 


. .ELSE] 


IF... GOTO 


INPUT 




LET 


LINPUT 




LIST 


MID 




NEW 


NEXT 




NO ECHO 


OLD 




ON ERROR GO TO 


ON...GOSUB 




ON. ..GOTO 


OPTION 


BASE 


OUT 


PRINT 




RANDOMIZE 


RCTRLC 




RCTRL 


READ 




REM 


RESTORE 




RESUME 


RUN 




SAVE 


STOP 




SWAP 


TRON/TROFF 




WAIT 


WHILE. . 


.WEND 


WIDTH 



4.4.4.2 Functions 



ABS 
COS 
GON$ 
INSTR 
LOG 

RIGHT$ 
SPACE $ 
STRING $ 



ASC 

EXP 

HEX$ 

INT 

MID$ 

RND 

SPC 

TAB 



ATN 


CHR$ 


FRE 


GOFF$ 


INKEY$ 


INP 


LEFT$ 


LEN 


OCT$ 


POS 


SGN 


SIN 


SQR 


STR$ 


TAN 





4-19 



CHAPTER 5 
THEORY OF OPERATION 



5.1 INTRODUCTION 

The VK100 terminal is a graphics terminal which displays 
information from the keyboard in local mode or displays 
information from the host computer in on-line mode. The system 
prints the display data on the Graphic Line Printer (LA34VA) . A 
writing tablet can also be connected to the hardcopy port. Only 
one type of device may be connected to the hardcopy port, graphics 
line printer or the writing tablet. Figure 5-1 shows the block 
diagram of the VK100 system. 




Figure 5-1 VK100 (GIGI) Block Diagram 



5-1 



5.2 TERMINAL CONTROLLER MODULE 

This chapter describes the functional theory of the VK100 (GIGI) 
Terminal. The terminal controller module is divided into five 
sections (Figure 5-2) : 

1. CPU 

2. Vector Generator 

3. I/O Ports 

4. Keyboard 

5. Power Supply 

5.2.1 Central Processing Unit (CPU) 

The CPU is an 8085 chip; 8-bit general purpose microprocessor 
capable of accessing up to 64K bytes of memory. Figure 5-3 shows a 
functional block diagram of the CPU. 

The microprocessor (8085A) performs the following functions. 

Clock generation 
Interrupt priority selection 
System bus control 
Executing the instruction 

The CPU transfers data on an 8-bit bidirectional Tri-State Bus 
(AD0 — AD7) that is time multiplexed to transmit the eight low 
ordered address bits. Address bits A8 — A15 expand the address 
capability to 16 bits, allowing the CPU to directly access 64K 
bytes of memory. 

The CPU generates signals telling peripheral devices what type of 
information is on the multiplexed address/data bus. Figure 5-4 
shows the basic CPU blocks. The CPU is a single chip that performs 
the following machine cycles. 

Memory write 

Memory read 

I/O write 

I/O read 

Opcode fetch 

INT ACK (interrupt acknowledge) 

Bus idle 

Table 5-1 shows the machine cycle status and control signals. 

The execution of any CPU program is a sequence of read and write 
operations. Each operation transfers a byte of data between the 
CPU and a specific memory or I/O address. 

Each read or write operation is referred to as a machine cycle. 
The execution of each instruction by the CPU includes a sequence 
of from one to five machine cycles. Each machine cycle contains a 
minimum of from three to six clock cycles (also referred to as T 
states) . Figure 5-5 shows an instruction cycle for Store 
Accumulator Direct (STA) . 



5-2 



U1 

I 

CO 



DATA BUS DO 07 



VECTOR GENERATOR 



CRTC 



BD0-BD7 



X REGISTER 
1 

HI LO 

1 



xn xo 



Y REGISTER 
1 

HI LO 

I 



V11-YO 



ADDRESS 
MUX 



A1 AO 
i i 



VECTOR 
ROM 



VECTOR 

GEN 

GO 



BDO 



LD EXECUTE 



4X4 FILE 



A1-A0 



MODIFY SCREEN DATA~I 



PATTERN 
REGISTER 



PATTERN 
MULTIPLIER 



I 



SCREEN 
RAM 



I 



SHIFT 
REGISTER 



SOPS 
REGISTER 



CRT OUTPUT 
CONTROL 



DATA FOR HARDCOPY 
PORT 



"J 



■m 



BIT0-BIT3 



CPU 



| ADR/DATA 



A8-A15 



A0-A7 



ADR LATCH 



o 



I/O R 
I/O WRT 



REGISTER CONTROL 



8202 



A0-A12 



A15-A13 



ROM 
SELECTOR 



16K X 1 RAM 
(8000-BFFF) 



8 BITS 



CPU 
"DATA 
LATCH 



MEMORY 

DATA 

LATCH 



T 

RD 



/O PORT 










COMMUNICATION 

INTERFACE 

8251-A 




I/O PORT 
SELECTOR 






EIA 




HARD COPY 









BAUD RATE 
GENERATOR 



SYSTAT 
A 



DIP 
SELECTION 



SYSTAT 
B 



DIP 
SWITCHES 



BD0-BD7 






A0-A6 



ROM -0 
0-8K 
(0000-1 FFF) 



ROM-1 
8-16K 
(2000-3FFF) 



ROM-2 
16-24K 
(4000-5FFF) 



ROM-3 
24-28 K 
(6000-63FF) 



KEYBOARD 



1 



COLUMN 
SELECTION' 



(ADDRESSES 
7000-700FI 



KEY 

HOLDING 

REGISTER 



ROWS A-F 
SHIFT 
CAP LOCK 



LED 

CONTROL & 
CLICKER 



|"keyboard 

MATRIX 



8 

LINES 
-V — 



DETECTS 

SWITCH 

OR 

SWITCHES 

DEPRESSED 



LEDS 






Figure 5-2 System Overview Block Diagram 



RST 6.5 



RST 5.5 



1RST 7.! 



INTERRUPT CONTROL 



SERIAL I/O CONTROL 



U1 
I 
4* 



ACCUMULATOR 
(A REG.) 



(8) 



POWER 
SUPPLY 



f _». +5V 
"I — *GND 



iz 



TEMP. REG. 



(8) 



8-BIT INTERNAL DATA BUS 



7^ 



FLAG (5) 
FLIP FLOPS 



ARITHMETIC 

LOGIC 

UNIT 

(ALU) 

(8) 



lz 



INSTRUCTION 
REFISTER 



s 



(8) 



INSTRUCTION 

DECODER 

AND 

MACHINE 

CYCLE 

ENCODING 



CLK 
GEN 


CONTROL 




TIMING AND CONTROL 


r 


RESET 


STATUS 


■\ 


1 ^ 

CLK OUT 


RD WR 


1 

ALE 


I i i 

S S, 10/M 


i 


I 

HLDA 


1 
RESET OU 



B (8) 

REG 



E 



7^ 



D 
REG 



(8) 



H 
REG 



(8) 



"c" 187 



REG 



E 
REG 



(8) 



L 
REG 



(8) 



STACK POINTER 



(16) 



PROGRAM COUNTER 



(16) 



INCREMENTER/DECREMENTER 
ADDRESS LATCH 116) 



REGISTER 
>" ARRAY 



u 



ADDRESS BUFFER 



(8) 



\7 



ADDRESS/DATA BUS 



lz_ 



DATA/ADDRESS BUFFER 



(8) 



7^ 



\7 



AD . 7 
ADDRESS/DATA BUS 



Figure 5-3 CPU Functional Block Diagram 





XTAL 














J_ 

1=1 

T 




CPU 
8085 


y ADDRESS BUS 




V 








A ,._, . N- 


INTR 


C 


V MUUIFLbXbU 






X AnnOCCC/HATA DIIQ 


INTA 


N V _ 










RESET IN 
RESET OUT 
























1 


















MA-8147 



Figure 5-4 Basic CPU Block Diagram 



Table 5-1 Machine Cycle Status and Control 



Machine Cycle 



Status Control 

I/O M SI S0 RD WRT INTA 



Op Fetch 




(OF) 





1 


1 





1 


1 


Memory Read 




(MR) 





1 








1 


1 


Memory Write 




(MW) 








1 


1 





1 


I/O Read 




(IOR) 


1 


1 








1 


1 


I/O Write 




(IOW) 


1 





1 


1 





1 


INTR Acknowlf 


adge 


(INA) 


1 


1 


1 


1 


1 





Bus Idle* 




(BI) :DAD 





1 





1 


1 


1 






INA(RSTS/TRAP) 


1 


1 


1 


1 


1 


1 






HALT 


TS 








TS 


TS 


1 



= Logic "0", 1 = Logic "1", TS = High Impedance 
* Bus idle (BI) only occurs in response to: 

1. DAD instructions 

2. During an acknowledge of RSTS, TRAP, or HALT instructions. 



5-5 



I 



MACHINE 
CYCLE 



T STATE 
CLK 



TYPE OF 
MACHINE CYCLE 



ADDRESS BUS 




DATA BUS 



INSTRUCTION CYCLE- 



MEMORY READ 

THE ADDRESS (CONTENTS OF THE 
PROGRAM COUNTER) POINTS TO 
THE FIRST BYTE (OPCODEI OF THE 
INSTRUCTION 



INSTRUCTION OPCODE (STA) 



-M 2 - 



MEMORY READ 

THE ADDRESS (PC + 1) POINTS 
TO THE SECOND BYTE OF THE 
INSTRUCTION 

LOW ORDER BYTE OF THE 
DIRECT ADDRESS 



-M3- 



MEMORY READ 

THE ADDRESS (PC + 2) POINTS 
TO THE THIRD BYTE OF THE 
INSTRUCTION 

HIGH ORDER BYTE OF THE 
DIRECT ADDRESS 



MEMORY WRITE 

THE ADDRESS IS THE DIRECT 
ADDRESS ACCESSED IN M 2 
AND M 3 

CONTENTS OF THE 
ACCUMULATOR 



Figure 5-5 Instruction Cycle for Store Accumulator Direct 



The CPU can address up to 256 different I/O addresses. These 
addresses have the same numerical values (00 through FF Hex) as 
the first 256 memory addresses. The 256 I/O locations are selected 
by the I/O M output. 

The status signals, I/O M, SI, and S0, define what type of machine 
cycle is about to occur. The I/O M signal identifies the machine 
cycle as either a memory reference or input/output operation. The 
SI status signal identifies whether the cycle is a read or write 
operation. S0 and SI can be used together (see Table 5-1) to 
identify read, write, opcode fetch, or halt machine cycles. Figure 
5-6 shows the timing and control for an opcode fetch. 

5.2.1.1 Address — When the CPU generates a 16 bit address, the 
lower byte is latched and the upper byte is held active by the 
CPU. Bits A0 — A15 address the following: 

RAM Memory 

A0 — A7 — Row address bits 

A8 — A15 -- Column address bits 

ROM Memory 

Address bits A13, A14, and A15 generate ENA ROM 0, ENA ROM 

l,and ENA ROM 2. Address bits A0 — A12 address the selected 

ROM. 

Register Control 

Address bits A0 — A6 address and generate register load pulses. 

Table 5-2 shows an address map. 




Figure 5-6 Opcode Fetch Machine Cycle 



5-7 



Table 5-2 8202 Pin Description 



Pin Name No. I/O Pin Description 



AL 
AL 1 
AL 2 

AL 4 
AL* 

AL 6 /OP 3 



6 


I 


8 


I 


10 


I 


12 


I 


14 


I 


16 


I 


18 


I 



Low-Order Address. These Address 
inputs generate the ROW 
Address for the Multiplexer. If 
AL 6 /OP 3 is pulled to +12V 
through a 5KX resistor, the 8202 
configures itself for 4K RAMs. If 
AL /OP- is driven with TTL levels, 
the 8202 configures itself for 16K 
RAMs. 



AH, 

AH 

AH, 

ah; 
ah; 

AH, 

ah; 



out 

OUT 
OUT, 

out: 

OUT' 

out| 
out; 



WE 



5 

4 

3 

2 

1 

39 

38 



7 





9 





11 





13 





15 





17 





19 






28 



High-Order Address. These Ad- 
dress inputs generate the 
Column Address for the Multiplexer. 
If the 8202 is configured for 4K 
RAMs, use AH fi as an active high 
chip select for memory controlled 
by 8202. For 16K RAM operation, AH 
becomes the most significant column 
address bit. 

Output of the Multiplexer. These 
outputs drive the addresses 
of the Dynamic RAM array. 
For 4K RAM operation, OUT 
drives the 2104A CS input. 
(Note that the OUT-, pins do not 
require inverters or drivers for 
proper operation. 

Write Enable. This output drives 
the Write Enable inputs of the 
Dynamic RAM array. 



CAS 



27 Column Address Strobe. This out- 
put latches the Column 
Address into the Dynamic RAM 
array. 



RAS 

RAS 1 

RAS! 

ras: 



21 





22 





23 





26 






Row Address Strobe. These outputs 
latch the ROW Address 
into the bank of dynamic RAMs 
selected by the 8202 Bank Address 
pins (B , B 1 /OP 1 ) . 



5-8 



Table 5-2 8202 Pin Description (Cont) 



Pin Name No. I/O Pin Description 



B„ 
bJ/OPj 



24 I Bank Address. These inputs 

25 I select one of four banks of 

dynamic RAM via the RAS out- 
puts. If the B^/OP, inpot^is pulled 
to +12V througn a 5KX resistor, the 
8202 configures itself to the Ad- 
vanced Read mode. This mode 
changes the function of the 8202 
RD/S and REFRQ/ALE inputs and 
disables the RAS_ and RAS. out- 
puts. 1 



RD/S 32 I 



WR 



PCS 



31 I 



33 I 



Read/S input. This input requests 
a read cycle. In normal operation, 
a low on this input informs the 
arbiter that a read cycle is 
requested. In the Advanced Read 
Mode, this input accepts the S. 
status signal from the 8085A (fully 
decoded for a read). The trailing 
edge of ALE informs the arbiter that a 
read cycle is requested by latching S . 

Write Input. This input requests a write 
cycle. A low on this input informs the 
arbiter that a write cycle is desired. 

Protect ed Chip Select. A low on this 
input enables the WR and RD/S. in- 
puts. PCS is protected against ter- 
minating a cycle in progress. 



REFRQ/ 
ALE 



34 I 



Ref re 

able. 

high 

arbit 

reque 

Mode , 

state 

RD/S. 

time , 

this 

possi 



sh Request/Address Latch En- 
During normal operation, a 
on this input indicates to the 
er that a refresh cycle is being 
sted. In the Advanced Read 

this input latches the 

of the 8085 S signal 

input. If S is 



into the 
If S J "is high at this 
a Read Cycle is requested. In 
mode, transparent refresh is not 
ble. 



XACK 



29 Transfer Acknowledge. This output 
is a strobe indicating valid data 
during a read cycle or data written 
during a write cycle. XACK can 
latch valid data from the RAM array. 



5-9 



Table 5-2 8202 Pin Description (Cont) 



Pin Name No. I/O Pin Description 



SACK 30 System Acknowledge. This output 

indicates the beginning of a memory 
access cycle. It is also an 
advanced transfer acknowledge to 
eliminate wait states. (Note: If a 
memory access request is made 
during a refresh cycle, SACK is de- 
layed until XACK occurs in the memory 
access cycle) . 

X /IO 2 36 I Crystal Inputs. These inputs are de- 
X /CLk 37 I signed for a quartz crystal to control 

the frequency of the oscillator. If 
X /OP is pulled to +12V through a 
IkX resistor, X./CLK becomes a 
TTL input for an external clock. 

TNK 35 Tank. This pin provides a tank 

circuit connection. 

V 40 +5V + 10% 
cc — 

V 20 Ground 

5 S 



5.2.1.2 ROMs — Four ROMs hold the firmware to run the system: 

Three 8K by 8 ROMs 
One 4K by 8 ROMs 

This means there are 28K of firmware space, however, the system 
uses only 26K. 

When the CPU reads the ROMs, it sends out an address (A12 — A0) to 
the ROM. Address bits A13 and A14 select one of the four ROMs. A15 
is high for all memory addresses. The ROM addresses follow: 

0000 — 1FFF (ROM 0) E53 

2000--3FFF (ROM 1) E52 

4 00 — 5FFF (ROM 2) E51 

6000 — 63FF (ROM 3) E50 

The CPU sends out the control signals RD and I/O M. Both these 
signals are active low. 

The data from the selected ROM is placed on the data bus and sent 
to the CPU. 



5-10 



5.2.1.3 RAMs — There are two RAMs in the system: 

System RAM 

Contains the CPU stacks, work areas and User's programs 

Screen RAM 

Stores the CPU data and attributes to be displayed on the CRT. 

The System RAM and the Screen RAM both are 16K by 1 RAMs. The 
Screen RAM is described in the Vector Generator section. The 
following paragraphs describe the system RAM. 

For any memory operation to occur, the CPU generates the following 
actions . 

Address 
Control 
Data 

Figure 5-7 shows how the CPU controls the System RAM. 

Address — The address range of the memory is 8000 — BFFF. The 
address bits, A0 — A15 go to the Dynamic RAM Controller (8202). 
The address bits contain the following information: 

1. Row Address (A0 — A6) 

2. Column Address (A7 — A15) 

3. Row Address Selection (RAS0 — 3) (A14, A15) . 



CPU 



DATA 
LATCH 



K 



BI-DIRECTIONAL 
LATCH 



ADR RANGE 1/ 



ADR 
LATCH 



8000-BFFF 



CONTROL 



l/OM, RD AND WR 



AO - A07 



ROW 



A8-A15 



* MUX 



COLUMN 



A14, A15 



V 







8202 (A0-A6 ROW) 

](A7-A13 COLUMN) 



5^ 



CLK 



1 




OUT 6-OUT 



RAS - RAS 3 



PCAS 



:> 



22m HZ 



MEMORY 



16K X 1RAMS 
(8) 



Figure 5-7 CPU to RAM Memory Block Diagram 



5-11 



Memory addresses within the 8000 — BFFF range have A15=l, A14=0. 
This combination selects RAS2. 

Control — The control signals are I/O M, RD and WRT. When low the 
I/O M signal enables the 8202 to receive RD or WRT commands. If 
high the I/O M signal prevents the 8202 from starting a memory 
cycle. The address at this time an I/O address. 

Data — The data path to and from the memory is shown in Figure 
5-6. 

Figure 5-8 shows the block diagram of the 8202 and its pin 
configuration. Refer to Table 5-2 for the 8202 pin description. 

5.2.1.4 Data Bus — The data bus is a Tri-State bus that connects 
the CPU to the following. 

RAM (memory) 

ROM 

I/O Port 

Keyboard 

Figure 5-9 shows the data bus. 

The CPU time multiplexes the low byte of the Data/Address Buffer. 
When the CPU reads a valid address, the data is gated onto the 
Tri-State Data Bus. When active, the direction signal RD allows 
the data in the data latch. The CPU then loads the data into the 
Data/Address buffer. When the CPU writes a valid address, WRT 
determines the data flow direction. This implies RD is high and 
the data is gated on the Tri-State Data Bus. 

5.2.1.5 Control Functions — The CPU control functions are 
divided into two groups. 

1. Memory control 

2. Register control 

Memory control generates memory reads, writes and opcode fetches. 
Table 5-1 shows the memory control for these operations. 

The registers that the system uses as control registers are I/O 
addresses . 

This means the CPU generates the following sequence. 

1. Address (of register) 

2. Data 

3. Control 

a) I/O M H (The address is an I/O Address) 

b) RD 

c) WRT 

Address bits A0 — A6 generate the appropriate register control 
signals (Tables 5-3, 5-4 and 5-5) . 

5-12 



Ul 

I 



AH 3 C 
AH 2 C 
AHtC 
AHnC 



OUT,C 
AL 2 C 

out 2 C 

_AL 3 C 
OUT3C 



_AL 5 

OUTgC 

AL6/OP3C 

OUT 6 C 

v sst 



40 


H v cc 


39 


DAH 5 


38 


3ah 6 


37 


DX1/CLK 


36 


D x /op 2 


35 


IJTNK 


34 


Drefrq/ale 


33 


Upcs 


32 


3 RD/S1 


31 


DWR 


30 


USACK 


29 


DXACK 


28 


HWE 


27 


Dcas 


26 


^RAS 3 


25 


Ub^op, 


24 


HB 


23 


3ras 2 


22 


Uras, 


21 


IDraso 



RAM 

ADDRESSES 

TYPICALLY 

A„-A, 3 

FROM 

PROCESSOR 



AL 05 • 
AL„/OP 3 

AH. e 



v 

V 



REFRESH 
COUNTER 



K> 



MULTIPLEXER 



ENCODED RAS ENABLES 
TYPICALLY A, „,A,s FROM. 
PROCESSOR 

READ AND WRITE j 

REQUESTS X 

PROTECTED CHIP SELECT| 

EXTERNAL REF 

REQUEST 



lect/ 

EFR I" 



B„- 

B,- 

fTB- 

wTT- 

PCS"- 

efro- 



ARBITER 



3=1 



refresh 

TIMER 



CRYSTAL 

OR TTL CLOCK - 

INPUTS 



X /OP 2 - 
X,/CLK 



y>OUT . 6 



MULTIPLEXED 
TO DYNAMIC RAM 
ADDRESS PINS 



TIMING 

AND 

CONTROL 



• WE 
CAS 
RAS, 



I- WRITE ENABLE FOR DYNAMIC RAM 
Y COLUMN ADDRESS STROBE 



RAS, 
RAS^ 



ROW ADDRESS STROBES 
■ SELECTS ONE OF FOUR 
BANKS 
RAS3 

XACK F DATA TRANSFER COMPLETE 
SACK V REQUESTS WAIT STATE WHEN 
INTERNAL REFRESH OCCURS 



OSCILLATOR 



Figure 5-8 8202 Block Diagram and Pin Description 



G1GMVK100) 

+5V 




DATA BUS DO D7 



TR1 -STATE 
BUS 



jm 



ROMS 
(4) 



I/O 
PORTS 



A-F 
SHIFT 
CAPS LOCK 



— »J — VW+5 



KEYBOARD 



Figure 5-9 DATA Bus 



Table 5-3 I/O Register Addresses 



Add 


ress 


Bits 


























Signals 










15 


14 


13 


12 


11 


10 


9 


8 


7 


6 


5 


4 


3 


2 


1 





I/OM 


RD 


WT 


Address He 


K Fur 


ction 





1 























1 




















1 





1 


40 


LD 


X LO 





1 

















1 





1 

















1 


1 





1 


41 


LD 


X HI 





1 














1 








1 














1 





1 





1 


42 


LD 


Y LO 





1 














1 


1 





1 














1 


1 


1 





1 


43 


LD 


Y HI 





1 











1 











1 











1 








1 





1 


44 


LD 


ERR 





1 











1 





1 





1 











1 





1 


1 





1 


45 


LD 


SOPS 





1 











1 


1 








1 











1 


1 





1 





1 


46 


LD 


PAT 





1 











1 


1 


1 





1 











1 


1 


1 


1 


1 


1 


47 


LD 


PMUL 





1 


1 




















1 


1 

















1 





1 


60 


LD 


DU 





1 


1 














1 





1 


1 














1 


1 





1 


61 


LD 


DVM 





1 


1 











1 








1 


1 











1 





1 





1 


62 


LD 


DIR 





1 


1 











1 


1 





1 


1 











1 


1 


1 





1 


63 


LD 


WOPS 





1 


1 








1 











1 


1 








1 








1 





1 


64 


EX 


MOV 





1 


1 








1 





1 





1 


1 








1 





1 


1 





1 


65 


EX 


DOT 





1 


1 








1 


1 








1 


1 








1 


1 





1 





1 


66 


EX 


VEC 





1 


1 








1 


1 


1 





1 


1 








1 


1 


1 


1 





1 


67 


EX 


ER 





1 


1 





1 














1 


1 





1 











1 





1 


68 









1 


1 





1 


1 











1 


1 





1 


1 








1 





1 


6C 


LD 


BAUD 





1 


1 


1 

















1 


1 


1 














1 





1 


70 


LD 


COMD 





1 


1 


1 











1 





1 


1 


1 











1 


1 





1 


71 


LD 


COM 





1 


1 


1 





1 











1 


1 


1 





1 








1 





1 


74 






) 


1 


1 


1 


1 














1 


1 


1 


1 











1 





1 


78 


KYBDW 





1 


1 


1 


1 


1 











1 


1 


1 


1 


1 








1 
I/O 



WRT 


1 


7C 









1 











































1 


1 





40 


SYSTAT A 





1 








1 






















1 











1 


1 





48 


SYSTAT B 





1 





1 






















1 














1 


1 





50 


UART 





1 





1 











1 










1 














1 


1 





51 


UAR 





1 





1 


1 



















1 


1 











1 


1 





58 









1 


1 






















1 

















1 


1 





60 









1 


1 





1 
















1 








1 


1 





1 


1 





68 


NOT USED 





1 


1 


1 



















1 


1 














1 


1 





70 









1 


1 


1 


1 
















1 


1 


1 











1 
I/O 


1 
RD 





78-7F 







5-14 



Table 5-4 Program RAM Addresses 



CPU Address 
Bits 



15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 

1 0000000000 8000 Hex 

T 

II 

16K of Address 
" Space 

1 1 1 1 1 1111111111 B FFF Hex 

1 1 0000000000 C 000 Hex 



T 
" 16K of Address 

" Space 

» TIT 

1111111111 FFFF Hex 



NOTE 

CPU Address Bits 15 and 14 are inputs to 
the M8202 and are used to generate RAS0 
through RAS3 

RAS — Enables refresh flip-flop 

to be cleared 

RAS 10 1 — Not Used 

RAS 2 10 — Used with address range 

8000 Hex to BFFF Hex 

RAS 3 11 — Used with address range 

C000 Hex to FFFF Hex 



Table 5-5 I/O ROM Microcode Address 



Address Bits Address Hex 

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Space Address Range 



00000000000 0000 HEX 

ROM 8K of Address 

Space 
1 1 11111111111 01FF HEX 

1 00000000000 2000 HEX 

ROM 1 8K of Address 

Space 
1 1 1 11111111111 3FFF HEX 

1 00000000000 4000 HEX 

ROM 2 8K of Address 

Space 
0101111111111111 5 FFF HEX 

1 1 00000000000 6000 HEX 

ROM 3 2K of Address 

Space 
0110001111111111 63 FF HEX 

* 1 1 1 00000000000 700 HEX 

1 1 1 0000000 1111 

16 Addresses 



* ROM 3 and Bit 12 equal to a 1 implies Keyboard address 



5-15 



5.2.1.6 Memory Refresh Cycle — A read cycle causes a refresh to 
occur. The memory refresh is controlled internally by the dynamic 
RAM Controller (8202) . Figure 5-8 shows the components used for 
the refresh cycle. 128 memory refresh occurs every 2 ms. The 
refresh logic has 2 sections. 

1. Internal Counter — contains the RAS address used during 
the refresh. The counter is incremented after each 
refresh resetting to zero after all RAS addresses have 
been refreshed. 

2. Arbitration — timing and control logic allows either a 
read, write or refresh cycle to occur. After any read or 
write cycle request, SACK (System Acknowledge) goes 
active if the cycle was not requested during a refresh 
cycle. If it was requested SACK is delayed until XACK 
(Transfer Acknowledge) thereby requesting wait states 
from the cycle requestor. 

5.2.1.7 Interrupts — Hardware interrupts are generated from two 
sources: (the vector generator and I/O port (Figure 5-10). 



CPU 

INTERRUPT LOGIC 



RST 5.5 
RST 6.5 
RST 7.5 


TX RDY (CPU SEND ME ANOTHER CHARACTER) 










RX RDY (CPU 1 HAVE A CHARACTER COME AND GET IT) 






(CPU ITS TIME TO SCAN THE KEYBOARD) 




















VSYNC 










VECTOR 
GENERATOR 




I/O PORT 



NAME 


PRIORITY 


ADDRESS BRANCHED 
TO WHEN 
INTERRUP OCCURS 


TYPE TRIGGER 


RST 7.5 
RST 6.5 
RST 5.5 


1 
2 
3 


3CH 
34H 
2CH 


RISING EDGE LATCH 

HIGH LEVEL UNTIL SAMPLED 

HIGH LEVEL UNTIL SAMPLED 



Figure 5-10 Interrupt Block Diagram 



5-16 



These interrupts change the flow of the executing program (ROM 
control) . 

The interrupts are sampled on the descending edge of the clock, 
one cycle before the end of the instruction in which the interrupt 
input is activated. The CPU saves the contents of the program 
counter before it branches to the subroutine. 

Refer to Table 5-6 for the interrupt priority structure. 

The vector generator and I/O port sections describe how the system 
generates the interrupts. The software controls the interrupt 
logic by using the RIM (Read Interrupt Masks) and SIM (Set 
Interrupt Mask) instructions. 

5.2.1.8 CRT Sweep Overview 

The CPU sets the horizontal and vertical timing registers in the 
CRT controller to control the horizontal and vertical sweep 
circuits. The horizontal timing registers are R0 — R3 and the 
vertical timing registers are R4 — R9. The register functions are 
as follows. 

Horizontal Total Register (R0) — This 8-bit write-only 
register determines the horizontal frequency of the 
horizontal sweep. 

Horizontal Displayed Register (Rl) — This 8-bit write-only 
register determines the number of displayed characters per 
horizontal line. 

Horizontal Sync Position Register (R2) — This 8-bit 
write-only register determines the horizontal sync position 
on the horizontal line. 

Horizontal Sync Width Register (R3) — This 4-bit write-only 
register determines the width of the horizontal sync pulse. 



The horizontal registers are programmed 
units with respect to the reference. 



in "character times" 



Table 5-6 Interrupt Priority, Restart Address, and Sensitivity 



Name 



Priority 



Address Branched To 

When Interrupt Occurs Type Trigger 



RST 


7.5 


1 


RST 


6.5 


2 


RST 


5.5 


3 



3CH 
34H 

2CH 



Rising edge latch 

High level until 

sampled 

High level until 

sampled 



5-17 



Vertical Total Register (R4) and Vertical Total Adjust 
Register (R5) — These two registers determine the vertical 
frequency of vertical sync. The calculated number of 
character line times is usually an integer plus a fraction to 
get exactly 50 or 60 Hz vertical refresh rate. The integer 
number of character line times minus one is programmed in the 
7-bit write-only vertical total register; the fraction is 
programmed in the 5-bit write only vertical scan adjust 
register as a number of scan lines. 

Vertical Displayed Register (R6) — This 7-bit write-only 
register determines the number of displayed character rows on 
the CRT screen and is programmed in character row times. 

Vertical Sync Position (R7) — This 7-bit write-only register 
determines the vertical sync position with respect to the 
reference. It is programmed in character row times. 

Interlace Mode Register (R8) -- This 2-bit write-only 
register controls the raster scan mode. These bits are zeros 
which means non-interlace raster scan mode is selected. 

For 60 Hz the CPU initializes the rei 
(CRR) as follows. 

R0 (horizontal total) 

Rl (horizontal displayed) 

R2 (horizontal sync position) 

R3 (horizontal sync width) 

R4 (vertical total) 

R5 (vertical total adjust) 

R6 (vertical displayed) 

R7 (vertical sync position) 

R8 (interlace mode) 

5.2.1.8.1 Horizontal Sweep — The horizontal sweep time is 63.131 
~s. This is the time needed for the beam to move from the left 
side of the screen to the right side of the screen (display time) 
and return to the left side (retrace time). 

The display time is 50.505 "s and the retrace time is 12.626 "s. 
These times are converted into tick values for the CRTC registers. 
One tick value is the time needed for the horizontal sweep to pass 
twelve pixels. One tick occurs every 0.789144 ns. 

The horizontal sync pulse triggers the horizontal sweep. The 
horizontal sync pulse has three components. 

1. HS pulse width 

2. HF horizontal front porch 

3. HB horizontal back porch 



sters in 


the 


CRT 


contro 


Her 


4F 


80-1 = 


=79 










40 


64 












44 


68 












41 


65 (' 


value car 


i be 


60 


—69 




tick; 


s de 


pendi 


ng 


on 


HP) 


41 


66-1 


=65 


























3D 


61 












3E 


62 





























5-18 



= 41 


66- 


■1 = 


=65 


Character 


row 


= 









Scan line 




= 3D 


61 






Character 


row 


= 3E 


62 






Character 


row 


= 














The HS pulse width is constant. The HF can be changed by the HP 
command. If the HF is increased by one tick then the HB is 
decreased by one tick. This action controls the horizontal sweep 
start time, which allows for positioning of the display area in 
the horizontal direction on the face of the CRT. 

5.2.1.8.2 Vertical Sweep — The vertical sweep is 50 or 60 Hz. 
The total vertical sweep is 16.666 ms. A horizontal sweep rate of 
63.131 ~s provides 264 available scan lines of which 244 scan 
lines are used. The remaining 20 scan lines include retrace time 
from the last active scan line. 

The vertical registers used are 

R4 (vertical total) 

R5 (vertical total adjust) 

R6 (vertical displayed) 

R7 (vertical sync positive) 

R8 (interlace mode) 

The CPU loads the vertical registers with scan line and character 
row values. 

The total sweep time is 66 characters. A character row by 
definition is four scan lines, which means there are 264 scan 
lines in a vertical sweep. 

The display time is 61 character rows (0 — 60) . The screen remains 
blank during display time. The screen blank time is five character 
rows. These rows are divided into: 

Vertical sync front porch — one character row 
Vertical sync pulse width — four character rows 
Vertical sync back porch — zero 

5.2.2 Vector Generator Overview 

The vector generator interfaces the VK100 to the CRT display 
(Figure 5-11) . The vector generator performs four functions. 

1. Generates a timing chain 

2. Generates display refresh sequence 

3. Generates the hardcopy output 

4. Generates status 

The vector generator, under ROM control, places characters and 
vectors on the CRT display. The system, using a crystal control 
clock (45.692 Hz), synchronizes the display sequence and generates 
the timing for the vector generator and the CRT monitor (Figure 
5-12). Time states control the vector generator, sync ROM and the 
vector ROM. 

The system uses a crystal control clock (45.692 Hz) to synchronize 
the display sequence and generate the timing for the vector 
generator and the CRT monitor (Figure 5-12) . 



5-19 



-DATA BUS 



VECTOR 
GENERATOR 



D0-D7 



BDO- 



BD7 



TIME STATE 
GENERATOR 



SYNC 
ROM 



VECTOR 
ROM 



ENABLE/ 
DISABLE 



VECTOR 
GEN. GO 



LD EXECUTE 



CRT CONTROLLER 



12 BITS 



X REGISTER 
HIGH 1 LOW 



12 BITS 



Y REGISTER 
HIGH 1 LOW 



ADDRESS 



MUX 



MODIFY SECTION 
8 BITS 





PATTERN 
REGISTER 










8 BITS 






PATTERN 
MULTIPLIER 










(2) 4X4 FILE R 


EGS 


_ 


DU 




DVM 




DIRECTION 




WOPS 










8 BITS 




SCREEN 




OPTIONS (SOPHS) 



1 BIT 



16 (16KX11) 
SCREEN RAM 

12 BITS OF 4 ATTR 



DATA 



12 BITS 



I BITS 

J 



12 BITSHFR 



DATA • 



J 



_, CRT OUTPUT ^_ 
CONTROL 



SCREEN COLOR 



DATA COLOR 



Figure 5-11 Vector Generator Block Diagram 



5-20 



18.750 
M HERTZ 




8202 




16.666ms 


















5.068 

M HERTZ 




8085 




I 


















45.6192 


121 .920ns) 


H-3 


. DOT CLOCI' 


ERTZ (65.762ns) 




M HERTZ 






' 15.2064 M H 
































+ 12 


1,267,200 _ CHARCLOC 


K 








(0.789U1ms) 


TO 6845'S 






















-264 










_ 














20.0111ms 








-80 


15,840 HORIZONTAL TOTAL 


























-317 








































X6 


4.735ms 


RIZONTALSYNC 


























X 6 


4.735ms 


JRIZONTAL BACK PORCH 


























X64 


50.505ms > Rf 


)RIZONTAL DISPLAY FOR 
8 DOTS 








76 




















3.156ms 


)RIZONTAL FRONT PORCH 














► HC 





Figure 5-12 System Timing 



5-21 



The vector generator performs two separate time shared operations. 

1. Modify screen RAM data 

2. CRT display 

A read modify write operation modifies the screen RAM. The screen 
RAM is addressed and 16 bits are read (12 bits of data and 4 
attribute bits) . Only one of the twelve data bits can be modified 
at a time. Then the modified data bit is written into the screen 
RAM. 

The CRT refresh holds the display for a limited amount of time. If 
the CRT is not refreshed the contents of the screen RAM fade and 
then disappear. 

The CRT refresh is a continuous action. The screen RAM is 
addressed sequentially. For each address twelve bits of data are 
loaded into the shift register. Then the data is shifted one bit 
at a time to the CRT display. The data that appears on the CRT is 
an image of the data in the screen RAM. 

5.2.2.1 Addressing the Screen RAM — The screen RAM is addressed 
through a two to one multiplexer (Figure 5-16) . When the modify 
screen RAM function is taking place, the address comes from the 
X and Y register. The WRT/RD signal when high allows the contents 
of the X and Y register to pass through the multiplexer to address 
the screen RAM. 

When the CRT refresh function is taking place, the address used 
comes from the sequential counter (MA) of the CRT controller. The 
low WRT/RD signal when low allows the contents of the MA register 
to pass through the multiplexer to address the screen RAM. 

The address bit breakdown is shown in Figures 5-13 and 5-14. The 
outputs of the address multiplexer are divided into two groups, 
the RAS and CAS bits. 

The RAS, CAS bits used when modifying the screen RAM are (Figure 
5-15) : 

RAS — Yl, X9 — X4 
CAS — Y8 — Y2 

The RAS, CAS bits used when doing a CRT refresh are: 

RAS — RA0, MA5 — MA0 
CAS ~ MA11--MA6, RA1 

The address bits X9 — X2 go through a translator, which makes sure 
that the output bits X3 and X2 are never equal to a binary three. 
Bank three in the screen RAM does not exist (Figure 5-16) . 



5-22 



LD/SHFR » 


SHIFT REGISTER 




- DATA TO CRT 










1 


- 12 BITS 












1 






SCREEN RAM 
16K X 1 


« RAS 

« CAS 








, 


t 


( 1 BIT OF DATA 








/ 






WRT/RD 




SCREEN RAM 
ADDRESS MUX 










(MA 


>T 




I (X,Y) 


























ROW 


COLUMN 




x Register 

ROW 


Y REGISTER 
COLUMN 






MODIFY 
DATA 


* STROBE 






TROLLER 


VECTOR 










SEQUENTIAL 


















COUNTER 








MA-8156 



Figure 5-13 Basic Overview of Address and Data Path 



SEQUENTIAL 
COUNTER 



h — 

MA 
MA11 
I 


10 


COLUMN 


• 






«• ROW ► 






MA9 


MA8 


MA7 


MA6 


RA1 


RAO 


MA5 


MA4 


MA3 


MA2 


MA1 


MAO 


A A ; 



CHARACTER ROW 



SELECTS GROUP 
THRU 63 



CHARACTER SCAN 



ROW 




LINES 



1 1 

T 1 





GROUP 


GROUP 1 


GROUP 2 





12 PIXELS 


12 PIXELS 


12 PIXELS 


1 








2 








3 









GROUP 62 


GROUP 63 


12 PIXELS 


12 PIXELS 















59 



SCAN , 
LINES 




Figure 5-14 Screen Update, Screen RAM Address Breakdown 



5-23 



SELECTS WHICH OF 
FOUR SCREEN BITS 
ARE TO BE MODIFIED 

BANK 
SELECT 



-COLUMN- 



Y8 



Y7 Y6 



Y5 



Y4 



Y3 



Y2 



-ROW- 



X9' 



X8 



X7 



X6' 



X5' 



X4' 



X3' 



X2' 



CHARACTER 
ROW 



CHARACTER 

ROWO 



CHARACTER 
ROW 59 



WHAT GROUP 
OF 64 PIXELS 



SCAN 
LINES 





GROUP 


GROUP 1 


GROUP 2 











1 








2 








3 









SCAN 
LINES 



YO= 0: EVEN ADDRESS 
=■ 1: ODD ADDRESS 



X' MEANS ADDRESS BITS X9-X2 



GROUP 62 


GROUP 63 





















GROUP 


GROUP 1 


GROUP 2 











1 








2 








3 









GROUP 62 


GROUP 63 



















Figure 5-15 Modify Data, Screen RAM Address Breakdown 



5-24 



X3 X2 

J L 

WRITE L O BANK 

ENAWR L O SELECTION 



en 

I 
ro 



CRT 
CONT. 



"Y" 

REGISTER 
12 BITS 



"X" 

REGISTER 
12 BITS 



MA0-MA11 RAO, RA1 



(Y1-Y8I 



X 19 2) J 



TRANS 
ROM 







$ 



ix9-x2) y 



ADR 



MUX 



-(X3.X2I 
•(X1.X0) 



RAO, MA5-MA0 
+ Y1 , X9-X4 



RAS 



> 



MA11-MA06. RA1 
+ Y8-Y2 



CAS 



Ir^y^ 



16K X 1 
SCREEN 
RAMS 



BANK 3 



v> 1110 



9 8 



3 2 10 



-WR/RD 



16K X 1 
SCREEN 
RAMS 



BANK 2 



16K X 1 
SCREEN 

RAMS 



BANK 1 



DATA BITS 



7 6 5 4 



til 



3 2 10 

TTT 



3 2 10 



3 2 10 

TTTT 



16K X 1 
SCREEN 
RAMS 



ATTRIBUTE 
BITS 



15 14 13 12 

B G B R 

L R L E 

I E U D 

K E E 
N 



BIT 
SELECTION 



1~T 

X1 X0 



Figure 5-16 Addressing the Screen RAM 



5.2.2.2 Modification of Data in the Screen RAM — The system sets 
up registers in the vector generator to place a character or 
vector on the screen. These registers control how the data is 
written into the screen RAM. The registers are as follows. 

Pattern register 

Pattern multiplier register 

Write options (WOPS) register 

These registers, and the bit selected for update, control how the 
data is modified. 

The CPU decodes the following write commands and then loads the 
commands into the pattern, pattern multiplier and the WOPS 
register. 

Write Pattern 
Write Multiplier 
Write Negate 
Write Complement 
Write Intensity 

The CPU loads the pattern register with the pattern to be written 
into the screen RAM. 

The contents of the pattern multiplier register (2's complement of 
the value) indicates how many times the pattern register output is 
used before allowing the pattern register to be shifted. The 
default value of the pattern multiplier is one. If the default 
value is loaded into the pattern multiplier, the pattern register 
output is used once before shifting. If the pattern multiplier is 
two the pattern register output is used twice before shifting. 

The CPU loads the Write Negate, Complement and Intensity commands 
into the WOPS register. 

The CPU loads the x and y registers with an address to modify data 
in the screen RAM. This address accesses a location in the screen 
RAM. The twelve bits of data are read and bits X3 and X2 select 
four of the twelve bits. This is called bank selection. Bits XI 
and X0 select which of the four bits is to be modified (bit 
selection) (Figure 5-17) . At this time the contents of the pattern 
register and WOPS determine how the selected data bit will be 
modified (Figure 5-18) . 

The following example shows how the selected bit is modified for a 
complement function. 

GIVEN: 

The output of screen RAM — selected bank = 0010 binary 

The output of WOPS register - bits 2 — = 100 binary 

The output of the pattern register = output bit = 1 binary 



5-26 



TRANSLATOR 
INPUT (9-2) 



11 10 9876543210 



(000) TA200 

(001) TA200 

(002) TA200 

(003) TA200 



100000000 
10000000 1 1 
1000000100 
100000 111 



(004) 


TA201 


1000001000 


(005) 


TA201 


100000 10 1 1 


(006) 


TA201 


100000 1 10 


(007) 


TA201 


1000001111 


(010) 


TA202 


1000001000 


(Oil) 


TA202 


100000 100 1 


(012) 


TA202 


100000 10 10 


(013) 


TA202 


100000 10 11 


(014) 


TA203 


100000 1 100 


(015) 


TA203 


100000 1 10 1 


(016) 


TA203 


100000 1 1 10 


(017) 


TA203 


100000 1 1 1 1 



"X" 



TRASLATOR 
ROM 
INPUT 
X9X2 



OUTPUT 



TRANSLATOR 
OUTPUT BITS 



AA 
AA 
AA 
AA 
AC 
AC 
AC 
AC 
AD 
AD 
AD 
AD 

AE 
AE 
AE 
AE 



11 10 98765432 10 



10 10 10 10 

10 10 10 10 

10 10 10 10 

10 10 10 10 



10 10 1100 

10 10 1100 

10 10 1100 

10 10 1100 



10 10 110 1 

10 10 1 10 1 

10 10 110 1 

10 10 110 1 



10 10 1110 

10 10 1110 

10 10 1110 

10 10 1110 



00 

1 

1 

1 1 



00 

1 

1 

1 1 



1 

1 

1 1 



00 

1 

1 

1 1 



COLUMN 



Y8 


Y7 


Y6 


Y5 


Y4 


Y3 


Y2 



ROW 



SELECTS 1 OF 3 BANKS 



Y1 X9' X8' X7' X6' X5' X4' 
I I I I I I 



X3' X2' 



X1 XO 

■ 



CHARACTER ROW 
NUMBER 



EQUIVALENT 
OF WHAT 
CHARACTER. 
ROW SCAN 
(1 OF 4) 



YOODD 
EVEN 

(X1000|=TRANSLATION ADR(TA)200 

X' MEANS ADDRESS BITS X9-X2 ARE TRANSLATED 



WHAT GROUP 
OF 64 PIXILS 



SELECTS WHICH — ■ 
OF 4 SCREEN 
RAM BITS ARE 
TO BE MODIFIED. 



Figure 5-17 Translation of X Bits 



5-27 



WOPS REGISTER 
07 06 05 04 03 02 01 00 













F2 

1 


F1 



FO 

N 


J GREEN I BLUE | 






BLINI 


< 


RED 




ENA 

ATTR 

CHANGE 


= 1 





DATA INPUT (8 BITS) 

o 

JbC SHIFTS OUT 9 BITS 



P 



PATTERN 
REG 



TEN TIMES FOR CHARACTERS 



DU 



(0) 



DVM 



(1 ) 



DIRECTION 



(2) 



WOPS 



RB, RA = 3 



SELECTION 



F2 



F1 



F0 



5IT f X1 

SELECTION < 

1 OF 4) I XQ 



BIT 

SE 

( 



"X" 
REG. 
"Y" 
REG 



ADDRESS 



!> 



SCREEN 

RAM 



1111' 



12 BITS 



> 



BANK 

SELECTION 



X3 

X2 

STROBE 



-TTf 



BIT 3 



BIT 2 



BIT 1 



BIT0 



1KX4 
ROM 
BIT 
SELECT 



MODIFY DATA INPUT (ONE OF FOUR BITS) 



Figure 5-18 Modify Data Bits 



-» WR DAT 3 
•*- WR DAT 2 
-+■ WR DAT 1 
♦ WR DAT 



5-28 



The output of the WOPS register equals 4 binary, a complement with 
no negate function. Refer to the complement equation in Table 5-7. 



Complement M = A + (P + N) 
Complement = 0010 + (1 + 0) 
Complement =1+1 
Complement = 



(0010 is selected bank) 
(1 is selected bit) 



The complement bit zero is written into the selected bank of the 
screen RAM. Initially, the value of the selected bank was 0010 
binary. After modification the value changes to 0000 binary. 

5.2.2.3 Refresh the CRT — The display area of the video monitor 
contains 240 scan lines (horizontal sweeps) with each sweep having 
768 picture elements called pixels. A pixel is the smallest 
picture element that can display data. The display area contains a 
total of 184,320 pixels. The color of the characters or vectors 
represents foreground information. The color of the screen 
represents background information. 

The characters, vectors and screen can be different shades of 
black and white or color. Two separate control circuits are used 
for CRT color control. 

1. Foreground control 

2. Background control 



Table 5-7 Screen RAM Write Control 



WOPS BITS 
2 10 



F2 Fl F0 Function 



Equation 



N Overlay 

I N Replace 
ION Complement 

1 I N Erase 



M=A+(P+N) 
M=P+N 
M=A+(P+N) 
M=N 



Legend for Equations 

M = Data to be written into memory 

A = Data now in memory 

P = Output of pattern register 

N = Negate bit 

T = OR 

+ = XOR 



5-29 



Foreground Control — The CPU loads the WOPS register with a value 
that defines the color of the character or vector. The output of 
the WOPS register bits F7 (blink) , F6 (green) , F5 (red) , and F4 
(blue) are inputs to the screen RAM attribute section. Every time 
the screen RAM is modified, the contents of bits F7 — F4 if enabled 
are written into the screen RAM attribute section. 



When the screen RAM is addressed, sixteen bits are read from 
memory. Twelve bits of data are loaded into the shift register and 
the four attribute bits are loaded into the S163 latch (Figure 
5-19) . The data output of the shift register is exclusively ORed 
with bit of the screen option register (SOPS) . 



selects the foreground or background colors. When 
1 bit is zero (normal video) and the shifted data 



The exclusive OR 

the video contro 

bit is a one, the attribute bits 

video data color (foreground) . 



from the latch determine the 



SHIFT 

REGISTER 

12-BITS 



RAS 
CAS 



I 



(DATA TO BE WRITTEN SHIFT DATA) 



EXCLUSIVE 
OR' 



3Dh 



SCREEN RAM (16) 
16KX1 RAMS 

12 DATA BITS 4 ATTRIBUTE 
BITS 
I 



READ 



GREEN 



BLUE 



BLINK 



S163 
LATCH 



WHAT 
COLOR 
IS THE 
DATA 



ROW 



COLUMN 



ADDRESS MUX 



CRT 
CONTROLLER 



2 



■ DRAS .. 



■ WR/RD 



RA0.MA5- 
MAO 



MA11-MA6, 
RA1 




BIT 0=0 NORMAL VIDEO 
1 REVERSE VIDEO 



MUX 



3 

13 



VIDEO 
DATA 



WHAT COLOR IS THE SCREEN 



HORIZONTAL SYNC 



CRT 
MONITOR 



LOAD SOPHS 
DATA 



VERTICAL 
SYNC 



Figure 5-19 Color Control 



5-30 



When the output of the shift register is zero and the video 
control bit is zero (normal video) , the attribute bits from the 
SOPS register determine the video data color (background) . 

When the SOPS register bit is a one (reverse video) , the SOPS 
register attribute bits are used for the foreground color and the 
latch attribute bits are used for the background color. 

Background Control — The ReGIS screen command, through the CPU, 
loads the SOPS register with a value that determines the 
background color. The SOPS register holds the background attribute 
bits. The SOPS register attribute bits are; bit 6 (green) , bit 5 
(blue) , and bit 4 (red) . These bits are inputs to the multiplexer 
that in a normal video condition furnishes the background color. 
The background color is displayed when the output of the shift 
register is zero and bit of the SOPS register is 0. 

5.2.2.4 Modify Screen RAM and CRT Refresh Timing — The sync ROM 
in the vector generator runs continuously. Figure 5-20 shows the 
sync ROM addresses which are a function of the Time State 
Generator (Figure 5-21) and other bits. Twelve addresses are used 
before repeating the sequence again. The WRT/RD signal controls 
the screen RAM address multiplexer. If the WRT/RD signal is low, 
the address from the mA sequential counter passes through the 
screen RAM address multiplexer. 

If the WRT/RD signal is high, the address from the x and y 
register passes through the screen RAM address multiplexer. 

The WRT/RD signal changes levels every third sync ROM address. For 
every WRT/RD time frame a RAS and CAS signal are generated. 
Depending on the sync ROM address, a load shift register or strobe 
pulse occurs (Figure 5-19). Strobe pulse loads the four-bit 
holding register with data from memory (X3, X2) . The following 
sequence of events occur. 

1. Data is loaded into the shift register. 

2. While the data is shifted is out, the x,y address reads 
the data to be modified. In another read cycle, X3 and X2 
selects the data to be modified and strobes the fours 
bits into the holding register. Only one bit is modified. 

3. While the data is shifted to the CRT, another RAS, CAS, 
LOAD function is performed. At the proper time another 
twelve bits are loaded in the shift register and shifted 
to the CRT. 

4. During the continuous shifting of data from the shift 
register to the CRT, the modified data is written into 
the screen RAM. The screen RAM data is modified by the 
execute point, erace and the execute vector commands. 
During sync ROM address 32, the execute vector command 
turns on the vector ROM. This activates the write signal. 



5-31 



SYNC ROM ADR [32 31 30 35 34|23 22 21 20 25 24 33 32 31 30 35 34|23J22 21 20 25 24J33 32] 
1 2 3 4 5 6 7 8 

WRT/RD | MA f ~ { MA | X/Y j MA | X~Y | MA | ~ I 






LDSHFR 



STROBE 
WRITE T 



i r 



R C LD 



R C S 



R C LD 



R C W 



R C LD 



R C S 



R C LD 



R C W| 



DATA SHIFTED 
TO CRT 



DATA SHIFTED 
TO CRT 



DATA SHIFTED 
TO CRT 



DATA 
SHIFTED 



DATA 

TO 

SHFR 



DATA 
TO BE 
MODIFIED 



DATA 

TO 
SHFR 



WRITE 
DATA IN 
SCREEN 
RAM 



DATA 

TO 

SHFR 



DATA 
TO BE 
MODIFIED 



X 

/1 BIT 



DATA 

TO 

SHFR 



WRITE 
DATA IN 
SCREEN 
RAM 



4 BITS/' 



MODIFY 



4 BITS / 



Figure 5-20 Screen RAM Data Timing 



DOWN COUNTER 



CHAR CLK 



+5V- 



ENBP UP/DWN CLK 

DA 

DB 

DC 

DD 



-O ENBT 



RIP 
LOAD OUT 



YT 



+5V 



JK 



A 
B 
C 
D 



TIME 
STATES 

I 
5 
4 
13 
12 
11 
10 
15 
14 
03 
02 
01 
00 
5 



JK 


D 


C 


B 


A 








1 





1 








1 








1 








1 


1 


1 








1 





1 











1 


1 














1 





1 





1 


1 





1 

















1 


1 











1 

















1 























1 





1 



Figure 5-21 Time State Generator 



5-32 



5.2.2.5 Generation of Vectors — The VK100 system can draw 
both characters and vectors. Section 5.2.2.5 describes characters. 
The following paragraphs describe vectors. There are two kinds of 
vectors . 

1. Basic vectors 

2. Arbitrary vectors 

Basic vectors fall under the following conditions: 

1. If coordinates X=0 and/or Y=0 

2. If the absolute value of x = absolute value of y [X]=[Y] 

There are eight basic directions for vectors (Figure 5-22) . All 
other conditions are arbitrary vectors. 

The terminal operator can type a character and rotate it in any of 
the basic directions (Figure 5-22) . For example the operator types 
in: 

"FORMAT" TEXT (DIRECTION) "Character to Print" 
"EXAMPLE" T(D45) "A" 

NOTE 
The above must be in ReGIS command mode 
to work. 

The T(D45) command displays the A character along the one basic 
direction, or 45 N direction. This character is a basic vector. 



3 (135°) 



4 (180°) ■• 



2 (90°) 



5 (225°) 6 (270°) 



1 (45°) 




0(0°) 



7 (315°) 



Figure 5-22 Basic Vectors 



5-33 



The CPU has to set up registers in the vector generator to display 
characters or vectors on the CRT. The following are the registers 
that are loaded. 

X and Y 

DO-Length of major axis 

DVM-Length of minor axis 

Pattern 

Pattern multiplier 

Direction 

Write options (WOPS) 

Screen options (SOPS) 

Execute vector 

Error register (only used with arbitrary vectors) 

The function of these registers follows. 

X and Y — These registers are loaded with the starting address of 
the character or vector. The X and Y register contents address the 
screen RAM when modifying data. The address control increments or 
decrements the x and Y individually or both at the same time. 

The X coordinate is X0 through X767. If the direction of the 
character or vector is ROM coordinate X0 through X767, X is 
positive. If the direction is from X767 to X0, X is negative. 

The Y coordinate is Y0 through Y240. If the direction of the 
character or vector is from coordinate Y0 to Y240, Y is positive. 
If the direction is Y240 to Y0, Y is negative. 

If both X and Y = during a screen RAM modify, the CRT displays 
the data in the top left corner of the screen. This corner is the 
first pixel of the CRT during display time. 

DU — The length of the major axis is loaded into this register. 
For character displays, the width of a character is loaded into 
the DU. 

For vectors, the firmware knows the vector starting point and how 
far the vector moves in the X and Y position. The larger of the 
two values is placed in the DU register. 

DVM — The length of the minor axis is loaded into this register. 
For character displays, the width of a character is loaded into 
the DVM. 

For vectors, the DVM receives the smaller of the X and Y values. 

Pattern — The pattern register is an eight-bit shift register 
that is parallel loaded and shifted out one bit at a time to a IK 
by 4 PROM. This register controls the pattern of the data written 
into the screen RAM. 



5-34 



If the pattern = 1, a modify function is performed. If the pattern 
= 0, the pass data is modified. This does not apply in replace 
mode . 

Pattern Multiplier — The contents of this four bit register can 
increase the width of a character or vector by a factor of one to 
sixteen. If the pattern multiplier register is loaded with all 
binary ones, the pattern register shifts every write time. If the 
pattern multiplier is loaded with 1110 binary, the pattern 
register shifts every two write times. 

Direction — The direction register is an eight bit register. Only 
four bits are used. Bits — 2 tell the vector direction and bit 3 
tells if the vector is a basic or arbitrary vector. If bit 3 
equals zero, the vector is a basic vector. If bit 3 equals one, 
the vector is an arbitrary vector. 

Write Options (WOPS) — WOPS is an eight-bit register. Bit 7 is 
blink control. Bits 6 — 4 tells the color of data (12 pixels) when 
in normal video mode. Bit 3 (equal to a one) enables attributes. 
Enable attributes is an address bit to the WRT ROM. This allows 
the contents of WOPS register bits 7 — 4 to be written into the 
screen RAM. 

Bits 1 and 2 describe how the data being modified is controlled; 
If it is overlayed, replaced, complemented or erased. Bit 0, the 
negate bit, controls the output of the pattern register. If bit 
equals a one, the pattern register output is complemented. 

Screen Options (SOPS) — The SOPS register is an eight-bit 
register which controls the following three functions. 

1. Blink 

2. Background color 

3. I/O port control (EIA, 20 mA, hardcopy and self-test) 

LD Execute — The execute instructions set the Go flip flop (G0 F „) 
which enables the vector ROM to run. This is necessary for writing 
the modified data in the screen RAM and reading the file register 
contents (DU, DVM, DIR, and WOPS) . 

5.2.2.6 Writing a Character on the Screen — Writing a character 
on the CRT is the same as writing a vector. The main difference is 
that a character is a series of parallel vectors. When you press a 
key the following events occur: 

1. At the next occurrence of VSYNC the CPU recognizes the 
keyboard interrupt. 

2. In response to the interrupt, the CPU enters the keyboard 
scan routine, reads the keyboard and determines which key 
was pressed. The processor then translates the key 
location code into an ASCII code and stores it in the 
keyboard line. 



5-35 



3. The processor reads the ASCII character in the keyboard 
line to determine what character to place on the CRT. 

4. The processor translates the ASCII character code into a 
dot pattern. To do this, the processor reads a character 
look-up table located in RAM. The look-up table consists 
of a series of character cells, one cell for each ASCII 
code. Each character cell contains 10 patterns to be 
written as vectors on the screen. These pattern vectors 
compose the character on the CRT screen. 

NOTE 
The look-up table is filled with the dot 
patterns for each displayable character 
during the ROM power-up sequence. The 
look-up table can also be filled from 
the host computer using the Load 
Character Cell command in the graphics 
mode. 

There are 10 pattern vectors for each character. To write a 
character into the screen RAM, the DU, DVM, WOPS, and direction 
registers are initially loaded. The following sequence of events 
must occur 10 times. 

1. The X and Y registers are loaded. The pattern of the 
character is loaded into the 8-bit pattern shift 
register. 

2. The CPU issues the Execute Vector command. The Execute 
Vector command sets the GO bit enabling the vector ROM to 
output. The address for Execute vector is 66. This means 
address bits Al and A0 are equal to a binary two. These 
address bits, Al and A0, are part of the vector ROM 
address bits which allows the vector ROM sequence for the 
Execute Vector command. 

3. It takes three cycles (or nine time states) to modify the 
data in the screen RAM. 

a. Read cycle — The X and Y register contents read a 
location of the screen RAM. The twelve bits of data 
that are read from the screen RAM go to the bank 
select logic. Bits X3 and X2 select which four bits 
will be strobed into the holding register. 

b. Modify cycle — The logic uses the pattern output 
WOPS, X and holding register to determine which bit 
will be modified by addressing a IK by 4 ROM. The 
address of the IK by 4 ROM is determined by the 
following . 



5-36 



Pattern register output bit — (A9) 

WOPS register output bits (F2,F1,F0) — (A8 — A6) 

X register output bit (XI, X0) — (A5 — A4) 

Holding register output bits (3,2,1,0) — (A3 — A0) 

c. Write cycle — When the write pulse occurs the output 
of the bit select ROM (WR DAT 3 — WR DAT 0) is written 
into the same bank in the screen RAM. 

4. The down counter whose value is initially nine bits gets 
decremented every time a write takes place. The logic 
checks to see if the down counter equals zero. This 
indicates a pattern or vector has been stored in the 
screen RAM. 

5. The X register is incremented or decremented according to 
the contents of the direction register. 

6. If the down counter is not equal to zero, steps three 
through five are repeated. 

If the down counter is equal to zero a pattern (vector) 
with nine bits is stored in the screen RAM. This resets 
the Go flip-flop and disables the vector ROM outputs. 

Steps one through six are performed for each pattern. The 
character appears on the CRT after the ten patterns are written 
into the screen RAM and those locations addressed by the CRT 
Controller (CRR) . 

5.2.2.7 Arbitrary Vectors — The vector generator produces basic 
and arbitrary vectors in the VK100 system. The basic vectors are 
shown in Figure 5-23. There are eight basic vector directions 45 
apart. Vectors drawn in between the eight basic vectors are called 
arbitrary vectors. 

The Breshinham algorithm is a series of calculations (Appendix B) 
that allows an arbitrary vector to light a pixel close to the 
ideal vector path. A staircase effect takes place when arbitrary 
vectors are drawn. This staircase effect can be seen by looking 
closely at the screen when it is displaying arbitrary vectors. 

A calculation requires twelve time states (Figure 5-24) . These 
twelve time states are divided into four groups. The four groups 
are repeated until the vector is drawn. The four sequential groups 



are 



DVM time (length of minor access) 
DU time (length of major access) 
WOPS time 



1. DVM time (length of 

3.' .,....„ ,..,«,... 

4. Direction tii 



ime 



5-37 



VECTOR ROM ADDRESS 



























































34 


33 


22 


21 


20 


25 


24 


33 


32 


31 


30 


35 


34 


33 


22 


21 


20 


25 


24 


33 


32 


31 


30 


35 



OUTPUT 

OF 

FILE REGISTER 



DVM 


DU 


WOPS 


DIRECTION 


DVM 


DU 


WOPS 


DIRECTION 



CO (VECTOR ROM) 



CALCULATION 
ER+DVM-MER) 



CALCULATION 
BR+DU-«-ER 



MODIFY 
SCREEN 
RDM 



EFFECT X ARRAY 
MAJOR & MINOR AXIS 



CALCULATION 
ER + DVM + 1-»ER 



CALCULATION 
ER+DU-»ER 



MODIFY 
SCREEN 
RAM 



EFFECT X ARRAY 
MAJOR AXIS 



LD ERROR 



I 
CO 



STROBE L 



CARRY (1) H 



PIXEL WRT 



L_ 



WRTL 



. CLKSX&Y REGISTER 
CLKSDOWNCOUNTER 



' CLK MAJOR AXIS 



Figure 5-23 Arbitrary Vector Timing 



Y REGISTER KrH X REGISTER | 
V CLK 



DIRECTION ROM 



CARRY-CLK MAJOR AXIS 



CARRY-CLK BOTH 

MAJOR AXIS 
MINOR AXIS 



V CLK- 



+5V 

L 



en 

I 
w 



ADDER 



C4 



rnr 



STROBE L 



ERROR REGISTER 
(8 BITS) 



^J 



VECTOR ROM 
GENERATES 2 
CLK ERROR PULSES 
(CARRY IS AN ADDRESS BIT) 

VECTOR ROM GENERATES _ 
1 CLK ERROR PULSE 



CLK 



LS670 



DU (MAJOR AXIS 



DVM (MINOR AXIS) 



DIRECTION 



DIRECTION 
ROM 



D 

E128 

C 

~T 

GOH 



YO- 
" CARRY 



F3- 
F2- 
F1 • 
F0- 
ENA ERROR 



A8 
A7 
A6 
A5 
A4 
A3 
A2 
A1 



D8 
D7 
D6 
D5 
D4 
D3 
D2 
D1 



PIXEL WRITE 



X DIRECTION CONTROL 



Y DIRECTION CONTROL UP | nnwN 



ENA Y (2) 



ENA X (2) 



COUNT 



WRITE OPTIONS (WOPS) 



READ 2nd 



SYNC ROM OUTPUT 
BITS RB, RA 



READ 1st 



READ 3rd 



READ 4th 



FILE 

REGISTER 
ADDRESS 
CONTROL 



FILE REGISTER 



022 
025- 
022 
125 



VECTOR 
ROM 



CLK ERROR 



■LD ERROR 



Figure 5-24 Carry Control 



When writing a vector, the firmware loads the following registers: 

DVM — with the length of the minor access. For an example use 
the value of 3 (Appendix B) . 

DU — with the length of the major access. For an example use 
the value of 5 (Appendix B) . 

Error Rec — is loaded with a value that the firmware obtains 
by dividing 2 into the largest value. For an example the value 
5 divided by 2 equals 2 with a remainder of 1 (Appendix B) . 

The following are the functions that occur in each group. 




WOPS Time — The modified data bits are selected and written into 
the screen RAM location specified by the X and Y registers. 

Direction Time — The outputs of the direction register, bits 
F3--F0, are inputs to the direction ROM (Figure 5-25). An 
arbitrary vector is drawn in direction three when the input bits 
of the direction ROM equal "B" hex. The carry bit equal to a one 
indicates that the major axis register is only affected. The 
direction affected is determined by the direction ROM input bits 
F0 — F2. Direction three is a negative direction. Therefore, the 
major access register decrements. 

If the carry bit equals zero, the major and minor axis registers 
are effected. The direction effected is determined by the ROM 
input bits F0 — F2. Direction three is a negative direction. Both 
the major and minor axis registers are decremented. 

The vector sequence terminates when the V clock signal clocks the 
downcounter to zero. This resets the Go flip-flop. 

The direction ROM produces the signal pixel write. The pixel write 
must be active to write data into the screen RAM. There are three 
conditions that prevent a write operation from occurring. 



5-40 



1. Do not write in direction: 2 from an odd line. 

6 from an even line. 

2. Do not write if the direction is 5 or 7. The scan line is 
even (Y0) and the last direction was 6. 

3. Do not write if the direction is 1 or 3. The scan line is 
odd and the last direction was 2. 



SCREEN RAM 



ADDRESS MUX 



T\ 



7S 



.ADDRESS. 
BITS ( 7 ) 



"Y" REGISTER 



7^: 



CONTROL "Y" 

• ENABLE Y 

• DIRECTION CONTROL 
L-COUNT UP 
H-COUNT DOWN 



"X" REGISTER 



7^ 



V CLK 



-CONTROL "X" 

• ENABLE X 

• DIRECTION CONTROL 
L-COUNT UP 
H-COUNT DOWN 



DIRECTION ROM 



PIXEL WRITE 



CARRY 



CARRY CONTROL 



CLK ERROR 



r^i. 




-STROBE 



_J 



LD ERROR 



VECTOR 
ROM 



7^ 



ADDRESS 

VECTOR 

ROM 



Figure 5-25 Direction Control 



5-41 



5.2.3 I/O Port Overview 

The VK100 interfaces to the host system through a serial data 
port. An 8251 programmable universal synchronous or asynchronous 
receiver-transmitter drives the port. This device translates 
between parallel and serial character formats. The 8251 adds or 
removes start and stops bits as needed. The data used are ASCII 
characters. Character parity may be enabled or disabled. The 
parity bit, if selected, takes the most significant bit position. 
The VK100 I/O system can connect the three CPU ports. 

EIA 

20 mA 

Hardcopy 

Figure 5-26 shows the Basic I/O Port block diagram. 

The communication interface (8251A) is the main control of the I/O 
section. The baud rate generator allows firmware control of the 
baud rates to transfer data through the 8251A module. 

The I/O port selection logic is controlled by the SL1 and SL0 bits 
of the screen option register (SOPS) . Different combinations of 
SL1 and SL0 select the desired port or the self-test feature. 

The self-test diagnostic feature is firmware controlled. A known 
value is sent to the I/O interface. The value goes through the 
8251A chip as serial transmit data, to the I/O port selection 
(self-test) . Then the data is serially routed to the RXD input of 
the 8251A chip. The chip assembles a data byte and sends the byte 
in parallel form to the CPU. The CPU compares the transmitted 
value to the received value. 



PARALLEL 
DATA 



CPU 
8085 



Cr 



i^O 



COMMUNICATION 
INTERFACE (8251-A) 

T" 



TXC 



£X 



RXC 



SERIAL 

DATA 

.RXD 



SERIAL 
DATA 



TXD. 



BAUD RATE 
GENERATOR 



I/O 

PORT 

SELECTION 



SL1 



3 



SLO 



SOPS 



EIA 
TX/RX 



20mA 
TX/RX 



HARD COPY 
TX/RX 



) 
) 



Figure 5-26 Basic I/O Port Block Diagram 



5-42 



5.2.3.1 Communication Interface (8251A) — This interface (Figure 
5-27) performs the following three functions. 

Modem Control 
Data Control 
Error Reporting 

Mode Instruction Register — After an internal reset, the CPU 
loads the mode instruction register. Then any control register 
writes will load the data into the command instruction register. 
To return the 8251A from command to mode instruction, the CPU sets 
the internal reset bit of the command register. 

The mode instruction register defines the general operating 
characteristics of the 8251A (Figure 5-28). The following 
paragraphs describe these characteristics. 

Baud rate factor 
Character length 
Number of stop bits 
Parity control 

The Baud Rate Factor (X16) — The baud rate selected is times 16 
(X16) because the TCLK and RCLK frequencies are 16 times the 
selected baud rates. To obtain the selected baud rate, divide the 
TCLK and RCLK frequencies by 16. 

Character Length — The length of a character transmission may be 
5, 6, 7 or 8 bits. The unused bits are zeros (Figure 5-29). 

Number of Stop Bits (1, 1-1/2, 2) — If the baud rate is 310 or 
above, the CPU selects one stop bit. If the baud rate is under 
310, the CPU selects two stop bits. 

Parity Enable — When set this bit enables parity generation and 
parity detection. 

Parity Generation Bit — When set this bit generates even parity 
for data transmission. Even parity means the character bits plus 
the parity bit have an even number of one bits. After receiving a 
data character the 8251A parity check logic counts the number of 
one bits in the character plus the parity bit. An odd number of 
one bits raises the parity error flag. 

When clear this bit generates odd parity for data transmission. 
Odd parity means the character bits plus the parity bit have an 
odd number of one bits. After receiving a data character, the 
8251A parity check logic counts the number of one bits in the 
character plus the parity bit. An odd number of one bits raises 
the parity error flag. 



5-43 



D ^<^> 



RESET - 

CLK- 

C/D- 

RT5- 

WR- 

C3- 

D5R- 
DTR« 
CT5- 

rts- 



DATA 

BUS 

BUFFER 




READ/WRITE 

CONTROL 

LOGIC 



MODEM 

CONTROL 



» 



to 



INTERNAL 
DATA BUS 



TRANSMIT 

BUFFER 

(PS) 



c 



TRANSMIT 
CONTROL 



RECEIVE 
BUFFER 
(S-P) 



•TxD 



•TxRDY 

-TxE 

-Tx? 



RECEIVE 
CONTROL 



►RxRDY 
-FUC 



Figure 5-27 8251-A Block Diagram 



MODE 
INSTRUCTION FORMAT 
ASYNCHRONOUS MODE 



D 4 D 3 



D, 



EP 



PEN 



BAUD RATE FACTOR 






1 





1 








1 


1 


SYNC 

MODI: 


(IX) 


(16X) 


(64X) 



CHARACTER LENGTH 



5 
BITS 



1 



6 
BITS 



7 
BITS 



BITS 



PARITY ENABLE 
1=ENABLE 0=DISABLE 



EVEN PARITY GENERATION 
1=EVEN 0=ODD 



NUMBER OF STOP BITS 



INVALID 



1 
BIT 



Vk 
BITS 



2 
BITS 



Figure 5-28 Mode Register 



5-44 



TRANSMIT/RECEIVE 

FORMAT 

ASYNCHRONOUS MODE 



TxD MARKING 



RxD 



TRANSMITTER OUTPUT 
— it 



START 
BIT 



DATA BITS 

a 



PARITY 
BIT 



STOP 
BITS 



0P| 

rs|_ 



RECEIVER INPUT 
It 



START 

BIT 



DATA BITS 
!»— — 



PARITY STOP 
BIT BITS 



top] 

ITS I 



TRANSMISSION FORMAT 

CPU BYTE (5-8 BITS/CHAR) 

li— — — 



DATA CHARACTER 

n 



ASSEMBLED SERIAL DATA OUTPUT (TxD) 



START 
BIT 



-* J- 



DATA CHARACTER 



-8 >- 



PARITY 
BIT 



STOP 

BITsJ 



START 
BIT 



RECEIVE FORMAT 
SERIAL DATA INPUT (RxD) 
i ! 



DATA CHARACTER 
1 > 



-J «— i 



PARITY STOP 
BIT I BITS | 



CPU BYTE (5-8 BITS/CHAR) 1 
»» 



DATA CHARACTER 



-i >- 



NOTE 1 



IF CHARACTER LENGTH IS DEFINED AS 5,6, OR 7 
BITS; THE UNUSED BITS ARE SET TO "ZERO". 



Figure 5-29 Transmit/Receive Format 
Asynchronous Mode 



5-45 



Command Instruction Register (Figure 5-30) — The command 
instruction register defines the controls used in the operation of 
the 8251A. The following are the signals that control this 
operation. 

Transmit Enable 
Receive Enable 
Data Terminal Ready 
Request to Send 
Error Reset 
Internal Reset 
Send Break Character 
Enter Hunt Mode 

Transmit Enable — When the CPU sets this bit the 8251A can 
transmit data. Resetting this bit inhibits data transmission. 

Receive Enable — When the CPU sets this bit the 8251A can receive 
data. Resetting this bit prevents data reception. 

The Transmit Enable and Receive Enable are both set in the VK100 
system. This allows the 8251A to operate in full duplex mode. 

Data Terminal Ready (DTR) — The CPU sets this bit for loopback 
test. 

Request to Send — The request to send signal is normally used for 
modem control. 

Error Reset — When the CPU sets this bit all error flags are 
reset. Parity Error (PE) , Overrun Error (OE) , and Framing Error 
(FE) are reset in the status register. 

Internal Reset — When set this bit returns the 8251A from Command 
instruction to Mode instruction. 

Send Break Character — When set this bit forces TxD to a low. 

Enter Hunt Mode — This bit is a zero. The VK100 system does not 
use the Hunt mode. 



5-46 



D, D 6 D 5 D 4 



COMMAND INSTRUCTION 
FORMAT 



1R 



RTS 



D, 



SBRK 



D, 



MPD 



TxEN 



TRANSMIT ENABLE 
1 -ENABLE 
0=DISABLE 



DATA TERMINAL 

READY 

"HIGH" WILL FORCE DTF; 

OUTPUT TO ZERO 



RECEIVE ENABLE 
1=ENABLE 

0=DISABLE 



SEND BREAK 
CHARACTER 
1-FORCESTxD "LOW" 
0=NORMAL OPERATION 



ERROR RESET 

1=RESET ALL ERROR FLAGS 

PE.OE, FE 



REQUEST TO SEND 
"HIGH" WILL FORCE RT5 
OUTPUT TO ZERO 



INTERNAL RESET 
"HIGH" RETURNS 8251 TO 
MODE INSTRUCTION FORMAT 



ENTER HUNT MODE 
1=ENABLE SEARCH FOR SYNC 
CHARACTERS 



Figure 5-30 Command Instruction Format 



5-47 



Status Register — Data Communication Systems require the status 

of the active device. To obtain the status, the CPU reads the 

status register. The following are the status register bits 
(Figure 5-31) . 

Transmitter Ready (TxRDY) 
Receiver Ready (RxRDY) 
Transmitter Empty (TxE) 
Parity Error (PE) 
Overrun Error (OE) 
Framing Error (FE) 
SYNDET 
DSR 

TxRDY — This bit signals the CPU that the transmitter is ready to 
accept a data character. The CPU can use TxRDY for interrupt or 
polled operations. In polled operations the CPU checks TxRDY using 
a status read operation. TxRDY automatically resets when the CPU 
loads a character. 

RxRDY — This bit indicates that the 8251A contains a character 
ready to input to the CPU. RxRDY connects to the interrupt 
structure of the CPU or for polled operation. The CPU can check 
the condition of RxRDY using a status read operation. RxRDY is 
automatically reset when the CPU reads the character. 

TxE — When the 8251 has no characters to transmit, the TxE output 
goes high. TxE automatically resets after receiving a character. 

The error conditions (PE, OE and FE) are covered in the 
asynchronous data transfer section. 

DSR — The CPU uses this bit to monitor the hardcopy port. The 
usage of this bit is covered in the Hardcopy section (Paragraph 
5.2.3.3) . 

Asynchronous Data Transfers — In the VK100 system there are two 
modes of data transfers: 

1. Data transmissions (TxD) 

2. Data receptions (RxD) 

Asynchronous Mode Transmissions — Whenever the CPU sends a 
character the 8251 does the following. 

Adds a start bit (low level) 

Adds the required number of stop bits 

Adds the correct parity bit if parity is enabled 



5-48 



STATUS READ 
FORMAT 



D 7 



DSR 



SYN- 
DET 
/8D 



OE 



PE 



TxE 



P. 

Rx 
RDY 



Tx 
RDY 



SAME DEFINITIONS AS I/O PINS 



PARITY ERROR 

THE PE FLAG IS SET WHEN A PARITY 
ERROR IS DETECTED. IT IS RESET BY 
THE ER BIT OF THE COMMAND 
INSTRUCTION. PE DOES NOT INHIBIT 
OPERATION OF THE 8251A. 



OVERRUN ERROR 

THE OE FLAG IS SET WHEN THE CPU 
DOES NOT READ A CHARACTER BEFORE 
THE NEXT ONE BECOMES AVAILABLE. 
IT IS RESET BY THE ER BIT OF THE 
COMMAND INSTRUCTION. OE DOES 
NOT INHIBIT OPERATION OF THE 8251A; 
HOWEVER, THE PREVIOUSLY OVERRUN 
CHARACTER IS LOST: 



FRAMING ERROR (ASYNCONLY) 
THE FE FLAG IS SET WHEN A VALID 
STOP BIT IS NOT DETECTED AT THE 
END OF EVERY CHARACTER. IT IS RESET 
BY THE ER BIT OF THE COMMAND 
INSTRUCTION. FE DOES NOT INHIBIT 
THE OPERATION OF THE fiPD8251 AND 
HPD8251A. 



TxRDY STATUS BIT IS NOT TOTALLY 
EQUIVALENT TO THE TxRDY OUTPUT 
PIN, THE RELATIONSHIP IS AS FOLLOWS: 
TxRDY STATUS BIT BUFFER EMPTY 
TxRDY (PIN 15) BUFFER EMPTY »CTS • TxEn 



Figure 5-31 Status Register 



5-49 



The character is then transmitted as a serial data stream on the 
TxD output (Figure 5-28). The serial data is shifted out on the 
trailing edge of TxC at a rate equal to 1/16 of the TxC as defined 
by the Mode Instruction. Break characters can be continuously sent 
to TxD if commanded to do so. If no data characters are loaded 
into the 8251A the TxD output remains high (marking) unless a 
break (continuously low) has been programmed. 

Asynchronous Mode Reception — The RxD line is normally high. When 
the line goes low this triggers the beginning of the start bit. 
The validity of the start bit is checked by strobing at the start 
bits nominal center. If a low is detected at the nominal center a 
valid start bit has been found. The bit counter then starts 
counting. The bit counter locates the center of the received bits, 
parity bits (if it exists) and the stop bits. The stop bits signal 
the end of a received character. The character is then loaded into 
the I/O buffer of the 8251A and the logic (RxRDY) signals the CPU 
that data is available. The 8251A checks each character for 
errors. There are three types of errors. 

1. Parity Error 

2. Framing Error 

3. Overrun Error 

Parity Error — The rising edge of RxC samples the receive inputs 
data and parity. If a parity error occurs, the parity error flag 
is set. 

Framing Error — Occurs if a low level is detected at the stop 
bit. 

Overrun Error — If a previous character has not been fetched by 
the CPU, the present character replaces it in the I/O buffer and 
the overrun flag is raised (the previous character is lost) . 

The occurrence of any of these errors will not stop the operation 
of the 8251A. 

Table 5-8 shows the addressing of the 8251A. 



Table 5-8 Addressing the 8251-A 



Address Bits 
CD RD 



WR 



CS 



Selection and Directive 









1 








1 








1 





1 





1 


1 








X 


X 


X 


1 


X 


1 


1 






8251A > Data Bus 
Data Bus > 8251A 
Status > Data Bus 
Data Bus > Control 

Data Bus > 3 State 



5-50 



5.2.3.2 Baud Rate Generator — The baud rate for a VK100 system 
is controlled by: 

Default set up switch pack (switches S6 — S8) 
SET-UP mode (Refer to Chapter 4) 
ReGIS command (Refer to Chapter 4) . 



On power up, or reset, the firmware uses default set-up switch 
pack (S6 — S8) to load the baud rate generator with a byte value. 
This value selects the Tx clock and Rx clock frequency. The low 



four bits of the byte value select the baud rate 
pulses and the high four bits select the baud 
clock. Both the Tx clock and Rx clock frequencies 
selected baud rate. If the selected baud rate 
second the clock frequencies are 4.8 kHz. 



for the Rx clock 

rate of the Tx 

are 16 times the 

is 300 bits per 



The baud rate generator sends the Tx clock or Rx clock frequency 

to the 8251A chip which divides the frequency by 16. The result is 

the device baud rate. Figure 5-32 shows the baud rate generator 
block diagram. 

Table 5-9 shows how the CPU selects one of the eight possible baud 
rates used for the receive and transmit frequencies. 



CLK 1 (12) 



BD 4 
BD 5 
BD6 
BD 7 



BDO 
BD 1 
BD 2 
BD 3 



(16) , : 
























(15) *■ 


A 

B 

D-LATCH 

D 




FREQUENCY 
DECODE AND 
CONTROL 


K 


REPROGRAMABLE 
FREQUENCY SELECT 
ROM 






(14) 


> 










(13) 


V 




W 


















U 












1 „ 


DIVIDER 




+2 










* 


(1) 
XTAL/EXT1 » 

5.68MHz 














o 

t- 
< 

-I 
-1 
o 
o 








(18) 
XTAL/EXT2 » 


























DIVIDER 




+2 
















* 


(4) n , 














i\ 








1BT7 


A 

c D-LATCH 




N 


FREQUENCY 
DECODE AND 
CONTROL 


Is, 


PROGRAMABLE 
FREQUENCY SELECT 
ROM 






.< 6 >: 




V 


> 




m » 


V 























(17) 



►T CLK 



(3) 



-R CLK 



Figure 5-32 Baud Rate Generator 



5-51 



Table 5-9 Baud Rate Selection Crystal Frequency = 5.0688 M Hertz 



Transmit/Receive 




Theoretical 


Actual 






Address 


Baud 


Frequency 


Frequency 




D C B 


A 


Rate 


16 X CLOCK 


16 X CLOCK 


Divisor 


1 





110 


1.76 


Hz 


1.76 


K Hz 


2880 


10 


1 


300 


4.8 




4.8 




1056 


11 





600 


9.6 




9.6 




528 


11 


1 


1200 


19.2 




19.2 




264 


10 1 





2400 


38.4 




38.4 




132 


110 





4800 


76.8 




76.8 




66 


111 





9600 


153.6 




153.6 




33 


111 


1 


19,200 


307.2 




316.8 




16 



5.2.3.3 Selection of I/O Port — The I/O ports are selected by: 

Default SET-UP switch pack 
SET-UP mode (Refer to Chapter 4) 
ReGIS commands (Refer to Chapter 4) . 

When a power up or reset operation is performed, the CPU reads the 
default SET-UP switch pack. The condition of switch two (S2) 
determines if the CPU is connected to the 20 mA or EIA port. If S2 
is open, the 20 mA port is used. If S2 is closed, the EIA port is 
used . 

When an I/O port is selected the CPU modifies bits SL1 and SL0 of 
the screen option register (SOPS) . The condition of these two bits 
connect the CPU to the selected port (5-33) . Table 5-10 also shows 
this condition. 

5.2.3.4 Transferring Data Through the I/O Port — The VK100 
system uses the following three ports to connect the CPU to other 
devices. 

20 mA 

EIA 

Hardcopy 

20 mA Port — The VK100 system has full-duplex capabilities. This 
includes a transmit and receiver channel (Jl) . 



5-52 



DATA BUS 



CPU 



ROMS 



RAM 



KEYBOARD 
LOGIC BOARD 



COLO 
COL 15 



ROW A-ROW F 
SHIFT 
CAPS LOCK 



KEYBOARD 
MATRIX 



STATUS A REG. 



HARD COPY 
DATA BITS 



I/O INTERFACE 



8251A 



TXC 



RXC 



BAUD- RATE 
GENERATOR 



DATA 



SOPS 
REGISTER 



SL 1 



SLO . 



CONTROL 



PORT SELECTION 
DATA PATHS 



DEFAULT 
SETUP 
SWITCH PACK 



C1=0 



EIA PORT A 
SELECTED _ 

"20mA PORT 
SELECTED 



± 



HOST 
COMPUTER 



MODEM 
DATA & 
CONTROL 
SIGNALS 



i © 1 



LINE 
PRINTER 



WRITING 
TABLET 



Figure 5-33 Port Selection Block Diagram 



Table 5-10 I/O Port Selection 

MUX Port 

Inputs SL1 SL0 Selection 



A 










B 





1 




C 


1 







D 


1 


1 




Note - 


- 


Level 


= L 




1 


Level 


= H 



EIA 
20 mA 
Hardcopy 
Self-test 



5-53 



Transmit Channel — The CPU sends the data to the 8251A. This is 
where the transmission format is put together according to the 
mode instruction register. The data stream is shifted out of the 
8251A serially on the TxD line. The data goes through the I/O port 
selected logic. The SOPS register bits SL1 and SL0 (L,H) selects 
the 20 mA drive circuitry to transmit the data to host computer 

(Figure 5-34) . 

The data that is transferred out to the 20 mA line goes through a 
photo transistor. When the photo transistor circuit receives the 
mark bit, the photo cell transistor is cut off. This allows Q7 to 
conduct which in turn causes Q8 to conduct. When Q7 and Q8 
transistors are turned on the source current (18 — 50 mA) flows 
from pin 2, through Q7 and Q8, out to pin 5. 

When the photo transistor circuit receives a space (start bit) , 
the photo transistor turns on. This action cuts off Q7, which 
then cuts off Q8. The current that flows from pin 2 goes through 
the constant current diode. This keeps a constant current of 2 mA 
that goes through the photo transistor out to pin 5. 

Receiver Channel — The receiver channel monitors the current 
loop. If a mark is detected, the receiver channel changes the mark 
to a binary one. If a space is detected, the receiver channel 
changes the space to a binary zero. 

The receiver channel detects a mark and space in the following 
manner (Figure 5-35) . The marking state is the initial condition. 

The marking current causes the photo diode to conduct. When the 
photo diode passes 18 to 50 mA of current, the photo transistor 
turns on. The conduction of the photo transistor causes a positive 
voltage drop that turns on Q6. When Q6 conducts, a mark condition 
exists. The output of Q6 is inverted. The mark bit goes through 
the receiver multiplexer to the RxD input of the 8251A. 

When a start bit is detected (space) the received current drops 
from (18 to 50 mA) to (0 to 2 mA) . The space condition cuts off 
the photo transistor which cuts off Q6. The output of Q6 is 
inverted (0). The space signal goes through the receiver 
multiplexer to the RxD input of the 8251A. 

Table 5-11 shows the transmitter and receives interface 
specifications. 

EIA Port — The data transfer is the same as the 20 mA port except 
the EIA drivers or receivers are selected. Figures 5-36 and 5-37 
show the block diagrams. 



5-54 



SERIAL 

DATA 

INPUT 




■MARK CONDITION 



CURRENT 

2mA=OFF=0 

10 mA 

18-50mA-ON = MARK= 1 



H: MARK 
L: SPACE 



Figure 5-34 20 mA Transmit Loop 




Rx D 



Figure 5-35 20 mA Receive Loop 



5-55 



Table 5-11 Interface Specifications 



Transmitter 



Min 



Open circuit voltage 
Voltage drop marking 
Spacing current 
Marking current 



Max 



Units 



5.0 


50 


Volts 


0.0 


2.0 


Volts 


— 


2.0 


MA 


20 


50 


MA 



Receiver 



Min 



Max 



Units 



Voltage drop marking 
Spacing current 
Marking current 



15 



2.3 


Volts 


3.0 


MA 


50 


MA 



FIRMWARE 
ROM 



CONTROL 
CPU 



CPU 



A12-A8 



ADR, C ONTROL, DATA 
12 LINES ! ~ 



A7A0 l/OM,WRT,RD- 



ADDRESS 
LATCH 



GET DATA 



DATA 



RAM 
MEMORY 



3 LINES 



CONTROL 



8 LINES 



DATA 
BUFFER 



A6 AO 



I/O WRT 



(70 16 ) 



AO 



BAUD RATE 
GENERATOR 



TxC 



RxC 



CSE1 



I/O RD 



i t 1 



DECODER 



1 : ; 



D0-D7 



UART i 

WRT.RD | 
i — ' — *l 

!_ 



COMMUNICATION INTERFACE 
8251 A 



START BIT 



TxD- 



MARKING 



DATA BITS 



STOP 
PARITY BITS 
BIT . y J>_ 



-SS-y 



l 



Tx 

I/O PORT 

SELECTOR 



SL1 = L 



J8 



-J EIA 

^ DRIVER 



TxD 



TO 
■♦HOST 

COMPUTOR 



SL0=L 



SOPS 
REGISTER 



Figure 5-36 EIA Transmit 



5-56 



FIRMWARE 
ROM 



CONTROL CPU 



CPU 

ADR CONTROL DATA 



A12-A8 



12 LINES 



A7 AO 



l/OM.WRT.RD 



ADDRESS 
LATCH 



HERE IS DATA 



DATA 



RAM 
MEMORY 



8LINES 



CONTROL 



I/O WRT 



A6-A0 



I/O RD 



CSEL 



1 



BAUD RATE 
GENERATOR 



TxC 



RxC 



AO 



±A 



DECODER 



| UART 
|^-WRT 
I ♦ 



COMMUNICATION 
INTERFACE 
8251 A 



RxD 



DATA 
BUFFER 



D0-D7 



START PARITY ^STOP 
BIT BIT / BITS 

RxD | | DATA BITS | | f ~~\ 



RX 

I/O PORT 
SELECTOR 



J8 



RxD 



-; r 

SL1=L SLO=L 



SOPS 
REGISTER 



HOST 
COMPUTER 



Figure 5-37 EIA Receive 



5-57 



5.2.3.5 Hardcopy Overview — The hardcopy mode outputs screen 
image information to a hardcopy device (LA34-VA or another future 
compatible device) to obtain a permanent record on paper. Only the 
information in the bit map memory is sent to the device. The video 
attribute information is ignored. The four ways of entering 
hardcopy mode are: 

1. Normal Screen Dump 

2. Auto-Hardcopy 

3. Partial-Hardcopy 

4. Hardcopy Dump in Graphics Mode. 

Normal Screen Dump — Once initiated the screen is frozen and the 
entire image prints. Use SHIFT/PF1 keys or DECHP escape sequence 
(ESC #7) to enter this mode. 

Auto Hardcopy — This is similar to the normal screen dump but it 
is initiated automatically before the screen clears or scrolls an 
entire display of new text lines onto the display. 

Auto Hardcopy is enabled using Set-Up (AH1) or SM escape sequence 
(ESC [ ? 24 h ] ), and disabled by AH0 or ESC [ ? 24 1 ] . To abort 
hardcopy before completion, use the SHIFT/PF1 keys. 

* The last letter of the sequence is a lowercase 1 (154 ) . 

Partial Hardcopy — This prints the number of lines specified by 
the parameters in the following DEC PDH escape sequence 

ESC [ Pn; Pn ! 8] 

This escape sequence freezes the display and prints from the text 
line specified by the first parameter to the line specified by the 
second parameter. 

Hardcopy Dump in Graphics Mode — Hardcopy can be initiated using 
ReGIS screen command with hardcopy option: 

S (H [, Yl] [, Y2]) 

If only one Y parameter is specified, the other Y parameter 
defaults to the current graphics cursor Y position. If neither Y 
parameter is specified, the whole screen is copied. 

Graphics Data Stream Format — The LA34-VA graphic printer accepts 
the hardcopy data from the VK100 in the following format: 

CR SP SP SP SP 

DCS Pn F . . . SD . . . ST PLO 

DCS Pn F . . . SD . . . ST PLO 



5-58 



Where: 




CR 


= 


SP 


= 


DCS 


= 


Pn 


= 




Pn 




F 




SD 




ST 



Carriage Return 

SPACE (ASCII 2/0) 

Device Control String: ESC P 

Parameter value for horizontal resolution selection: 

= 1 for horizontal resolution 

= q This final character donates the subsequent 

characters are encoded raster data to be 

printed . 
= String Data 
= String Terminator: ESC\. Character processing 

returns to the method prior to the DCS. 



PLO = Partial Line Down: ESC K moves to next line of 
graphic data. 

The line printer connects to VK100 terminals in two ways. 

1. Line printer connected only to a single terminal (Figure 
5-38) 

(Line printer dedicated to one terminal) 

2. Line printer connected to multi-terminals (Figure 5-39) 
(Line printer is shared by many terminals) 

Figure 5-38 shows the cables used with both systems. 



UK100 



'MALE PLUG 

..FEMALE 
CONNECTION 



TERMINAL 



-hr+-t- 



Tx D 



R xD 



-ht*t- 



-t*+H- 



CTS 



+°+h- 



RTS 



4H-4- 



ir*-' 



LINE PRINTER 
LA34-VA 



BC22A-XX 



Figure 5-38 Line Printer Connected to Single 
Terminal 



5-59 




< BC22A XX OR EQUIVALENT CABLE 
■> BC22B XX OR EQUIVALENT CABLE 
BC22B-01 (Y-CABLE) 

-> MALE EIA CONNECTOR 



-< FEMALE EIA CONNECTOR 

MA-8203 



Figure 5-39 Printer Connection to Multiple 
Terminals and Connector Names 



Line Printer — Connected to Multi-terminals — The VK100 has 
the ability to organize multi-terminal demands for the hardcopy 
device. When the terminal outputs to the hardcopy device, all 
other terminals in the chain are locked out. The next terminal to 
be served depends on: the position of the currently printing 
terminal, its relation to other terminals in the chain, and the 
entering order of the hardcopy requests. 

In general, the terminal farthest away from the printer has the 
higher priority and prints next. There is no limitation on the 
number of VK100 terminals that can connect to the line printer as 
long as the maximum distance between terminals is 50 feet. The 
number of VK100S serviced is limited by the users response time. 

When a VK100 is powered off, all upstream terminals (farthest away 
from the hardcopy device) are broken off the chain. The upstream 
terminals are reconnected to the printer by bypassing the Y cable 
on the powered off terminal. 

5.2.3.5.1 VK100 Daisy Chain Bus Control — The daisy-chain bus 
connecting the VK100S to the LA34-VA Graphic Line Printer is 
divided into data and control lines. 

Data Lines 

1. Transmit (TxD) 

2. Receive (RxD) 

Control Lines 

1. Request to Send (RTS) 

2. Clear to Send (CTS) 

Figure 5-40 shows how each terminal interactively controls which 
terminal uses the VK100 daisy-chain bus. 



5-60 



TxD FROM 8251A- 



TO STATUS "B" 
ACTS 



RxD TO 8251A 



TO 8251 A DSR INPUT* 




+12V 



UTxD 



*• DTxD 



DRxD 



- URxD 



*» DCTS 



UCTS 



19 

• URTS 



Figure 5-40 Logic for Hardcopy Bus Control 



The signals that use the hardcopy daisy chain are: 

Upstream transmit data (UTxD) 
Downstream transmit data (DTxD) 
Upstream receive data (UPxD) 
Downstream receive data (DRxD) 
Upstream clear to send (UCTS) 
Downstream clear to send (DCTS) 
Upstream request to send (URTS) 
Downstream request to send (DRTS) 

Terminals in the daisy-chain bus use an interconnecting dialogue 
that allows only one terminal at a time to use the bus. The 
following paragraphs describe this dialogue. 

BUS NOT BUSY 

When the bus is not busy each VK100 has as inputs, DCTS low and 
URTS high. The logic in each VK100 passes on the output signals, 
UCTS low and DRTS high. All VK100 are enabled to transfer data. 



5-61 



CPU WANTS TO USE BUS 

A CPU that wants to transfer data reads two status registers. 

1. Status Register B (checks ACTS bit) 

2. Status Register 8251A (checks DSR bit) 

The ACTS bit reflects the inverted condition of DCTS 
low (ACTS bit=l). The DSR bit reflects the condition of 
URTS high (DSR bit=0) . The only time a VK100 can use the 
bus is when ACTS bit=l and DSR bit=0. 

When the CPU finds the ACTS bit=l and DSR bit=0, it then clears 
the RTS bit in the command register in the 8251A. RTS switches the 
following signals. 

1. UCTS goes high — in the upstream terminal this signal 
name becomes DCTS high and is inverted changing the ACTS 
from a one to a zero. The upstream terminals have ACTS 
bits equal to zero to prevent the terminals from using 
the bus. 

2. DRTS goes low — in the downstream terminal this signal 
name becomes URTS low and is inverted changing the DSR 
bit from a zero to a one. The downstream terminals have 
DSR bits equal to one to prevent the terminals from using 
the bus. 

CPU USING BUS 

The terminal after gaining control of the bus transfers the data 

to the line printer (TxD) . 

BUS NOT BUSY 

When the CPU finishes the data transfer the CPU sets RTS. RTS 

switches the UCTS and DRTS and the bus is no longer busy. 

5.2.3.5.2 Hardcopy Data Transfer — To transfer data to the line 
printer the following sequence takes place. 

1. SET-UP 

2. The DVM register is loaded. Direction equals 2. 

3. The direction register is loaded. Direction equals 6. 

4. The X and Y register is loaded. 

5. The Baud Rate Generator is loaded. 

6. The instruction format register is loaded. 

For the following sequence of events refer to Figure 5-41. 

SYSTAT A (X0, Y0) — Firmware reads 4 bits from the 
screen RAM, (bits 0, 1, 2 and 3 of scan line zero) by 
issuing the instruction SYSTAT A. When the CPU receives 
the 4 bits it masks out bits 1, 2 and 3 and saves bit 
zero in a register X LSB in the CPU. 



5-62 



SYSTAT A (X0, Y2) — Firmware reads 4 bits from the 
screen RAM, (bits 0, 1, 2 and 3 of scan line two) by 
issuing the instruction SYSTAT A. When the CPU receives 
the four bits it masks out bits 1, 2, and 3 and saves bit 
zero in a register X LSB + 1 position. 

The above sequence continues until six reads are done 
(X0, Y12) . At this time six-bit position zeros are stored 
in a register in the CPU. 

The firmware makes an ASCII character by adding 077 octal 
to the contents of register X and sends the new value to 
the 8251A transmit buffer. 

The 8251A assembles the data into the correct format, and 
transfers the data to the line printer. 

The line printer receives and assembles the transmission, 
subtracts 077 octal from it and stores the result in a 
256 byte buffer. 

When its buffer is filled, the line printer transmits 
XOFF to the Receive Data buffer in the 8251A. This 
interrupts the CPU, signalling it to stop sending 
characters. When the buffer is able to receive more data 
it transmits XON to the CPU. 

Starting at bit zero position the data is transferred as 
follows. 

SCAN LINE — 12 six bit zeros, six bit ones 

six bit 767 

SCAN LINE 12 — 26 six bit zeros, six bit ones 

six bit 767 

SCAN LINE 226 — 240 six bit zeros, six bit ones 

six bit 767 



5-63 



I 



SCAN 
LINES 



x *\ ADDRESS N, 

y */ MUX ./ 



SCREEN 
RAM 



X 


= 0, 


Y 


= ] 


X 


= 0, 


Y - 


-2 


X 


= 0, 


Y 


= 4 


X 


= 0, 


Y = 


= 6 


X 


-0, 


Y ■ 


• 10 


X 


= 0, 


Y = 


= 12 



— DOES 6 READS 



X - 1, Y-0 
X= 1, Y-2 
X = 1, Y = 4 
X = 1, Y = 6 
X= 1, Y- 10 
X = 1, Y = 12 



— DOES 6 READS 



ETC 



12 bit y 



BANK 
SELECT 



T\. 

4 BITS > 



CONSTANT 



077 OCTAL 



(Y) 


DATA 

BITS (X) 

12 3 


LD SYSTAT A (6 Tl 
1 2 


MES) 
3 













> 













2 



















> 


V 


4 










!> 











V 


6 



















; 


V 


10 



















' 


r 


12 



















J 


V 



1ST READ 
2ND READ 



6TH READ 




RESULT OF 1ST READ 




ALU 



s 



8251A TRANSMIT 
BUFFER 



LINE PRINTER 



s 



256 BYTE 
BUFFER 



REGISTER IN CPU 



SERIAL DATA STREAM 



Figure 5-41 Hardcopy Data Transfer 



5.2.4 Keyboard 

The keyboard is the user's input device to the terminal. The 

keyboard logic is divided into two sections. 

1. Keyboard Matric 

The keyboard switches are arranged like a typewriter with 
a numerical keypad. The keyboard matrix also provides 
light indicators. 

2. Keyboard Interface 

The keyboard interface is on the terminal controller 
module and determines which keys have been pressed. 

The keyboard is a firmware scanned key array, mapped into memory 
space (RAM) . The CPU reads the keyboard array 16 times every 60th 
of a second to find out if any keys have been pressed. The 
keyboard logic consists of: 

Keyboard array 

Array column selector 

Indicators 

Audible section 

The keyboard array consists of switches arranged in a column, row 
matrix. There are 15 columns (1 — 15) and 6 rows (A — F) . Each 
switch has its own column and row position (Figure 5-42) . 

The CPU selects the column to read by using address bits A0 — A3. 
When column one is selected, a ground (low) is present on one side 
of the following switches: SET-UP, ESC, TAB, ENTER and PF1. If one 
or more of the switches is pressed, the lows will be felt on the 
corresponding row bits. Then the CPU does a keyboard read (KBRD) . 
Figure 5-43 shows column two addressed with the A switch pressed. 
The A switch pressed means the row C output is low and when the 
KBRD is active D2 goes low. All other bits are high. The code sent 
to RAM memory for an A is 11111011. 

The keyboard write register controls the audible and indicator 
logic. Bits 1 — 6 control the indicators. Bit six output has two 
destinations: 

1. ON-LINE LGD 

2. Inverted bit six - LOCAL indicator 

The following are the indicators. 

L2 

LI 

HARDCOPY 

BASIC 

NO SCROLL 

ON-LINE 

LOCAL 

Bit six controls the ON-LINE/LOCAL signal. 

5-65 



L71 

I 

en 
en 







































1 


COLO 
































2 


COL 1 




SET UP 




























3 


COL 2 


i 


























4 


COL 3 


2 
























5 


COL 4 


# 
3 






















6 


COL 5 


$ 
4 

°>1 




















7 


COL 6 


% 
5 


















8 


COL 7 


A 

6 
-Oj6-i 
















10 


COL 8 


& 

7 

-d"jb-i 














11 


COL 9 


8 
°>1 












12 


COL 10 


( 

9 
■tfto-, 










13 


COL 11 


1 


«>1 








14 


COL 12 


^t 






15 


COL 13 


■tf|b-| 




16 


COL 14 






17 


COL 15 


'V 


B.S. 


21 


ROW A ( LSD) 


ESC 


Q 


W 


E 

4h 


R 


T 


Y 


U 


1 
■°1°1 





P 


■°Vi 


} 
■djb-i 


DEL 


BREAK 


ffif 


22 


LED 1 


-tffc^ D1 


W 


23 

— • 

24 


ROW B 


TAB 


A 


S 


D 

■OJ&-V 


F 
■OjS-, 


G 


H 


J 


K 


L 

-Ojb-, 


4h 


<^1 




^ 


RETURN 
^ D2 


rsir 


LED 2 


^ 


25 


ROWC 


ENTER 
-dto-t 


NO 
SCROLL 

<Sfo-i 


z 

-d+O-i 


X 

T°n 


C 
■°>1 


V 


B 

-OJO-i 


SPACE 


N 


M 


< 


> 


? 


L.F. 

■OlO-i 


D3 


rST 


26 


LED 3 


<s> 


27 


ROW D 


1 


2 
■°>1 


3 


4 


5 


6 

-L. 
-OlO-i 


7 

-4h 


8 


9 





■°>I 


■OjO-i 


Lof^ 


D4 


rtf 


28 


LED 4 


^ 


29 


ROW E 


PF1 

LojO-i 


PF2 


PF3 


PF4 


t 




Lot"*! 


^1°1 


CONTROL 


AT 


30 


LED 5 


w 


31 


ROW F (MSD) 


























CA 

J 

L SHIFT " 
R SHIFT 


3 S LOCK 


fwT 


32 


LED 6 




-°1*1 


D6 


vR* 


33 


CAPS LOCK 






rwT 


34 


LED 7 




-o;o- 


D7 


^f 


35 
36 
37 


SHIFT 








+SV 




4 


38 
| 39 








W 


MA 82 04 



Figure 5-42 Keyboard Matrix 



KEYBOARD 
MATRIX 



COLUMN 



c\ 



COLUMN 2 



CAPS 
LOCK 



ft 



LSHIFTj-T 1 -*^ 



Q 



COLUMN 7 



COLUMN 8 



COLUMN 15 



LED 2 



LED 6 



LED 8 



LED 7 



ROW A 



ROW B 



ROW D 



ROW E ^ 



ROW F 



VZ7 



R SHIFT 



LOGIC BOARD KEYBOARD SECTION 



— C 

— 



iSS 



DB 



DA 



T^_ 



A1 
-A0 



-A2 



o 



A3 



ADDRESS BITS A3, A2, A1, AO 
ARE EQUAL TO (21 1 
TO SELECT COLUMN 2 



TE2 



-DO 

-D1 



-►•D2 



-»-D3 



-♦D4 



-»-D5 



-»-D6 
-►D7 



-KBD R 



Figure 5-43 Keyboard Road with "A" Switch Pressed 



5-67 



Write register bits 77 and 8 control the two audible sounds 
emitted from the loudspeaker: the keyclick and beeper (Figure 
5-44) . 



A one-shot multivibrator determines the keyclick 
output is high for 1.5 ms and low for 30.2 ms. 



signal, the 



The beeper signal is high for 17.2 ms and low for 16.5 ms . 

5.2.5 Power Supply 

The VK100 is driven by a free running, flyback mode, off-line 
switching power supply. It accepts either 115 or 230 Vac input and 
delivers three regulated dc outputs: +5 V, +12 V -5 V. 



LED CONTROL 


LS 


8 


7 


6 


5 


4 


3 


2 


1 






BDO- 

1 BD1 • 

BD2- 

1 BD3- 
BD4 ■ 
BD5 ■ 



BD 6- 

1 BD7- 



L2 



L1 



HARD COPY 



BASIC 



NO-SCROLL 



ON LINE 




10 10 10 



>+5V 



M_OCAL 



-H |-«-1.5mS 

Is. . .JT 30.2mS Tl 

-Qo— [KEY CLICKER) — 



H BLEEPER h j 

^7.2mSK 



-16.5mS- 



ASI 



KBDW 

t 
(ADR=68) 



Figure 5-44 LED (Indicator) Keyclicks and 
Bleeper Block Diagram 



5-68 



The power supply has the following protection. 

Overcurrent Protection — No damage to the power supply 
result from a short circuit of any duration across the 
output terminals. Normal operation resumes upon removal 
of the short circuit. 

Overvoltage protection — A crowbar circuit is provided 
to protect the load from damage. The crowbar activates if 
the +12 V output voltage range is between 13.0 V and 15.0 
Vdc. No damage to the power supply results from 
activation of the crowbar for any duration and at any 
ambient temperature within specification limits. 

Tolerance Band = +12 V: 11.4 to 12.6 dc 

-12 V: -11.4 to -12.6 dc 

Output Current = +12 V: 0.2 to 0.9A dc 

-12 V: 0.2 to 0.075A dc 

Voltage adjustments = none. 

Figure 5-45 shows the power supply schematic. The explanation 
follows. 

The mains are brought in through an EMI filter, (Tl, CI, C2, and 
C3) rectified by BD1 and deliver approximately 300 Vdc across 
capacitive input filter C6, C7, C8, and C9. Current surge is 
limited by Rl and R2 and transient voltages are suppressed by VD1 
and VD2. By turning on power transistor Q2, this voltage is 
applied across the primary of T2, charging its inductance with a 
linear current ramp. When Q2 is turned off, the energy stored in 
T2 is delivered from the secondary windings through rectifiers, 
capacitive input filters and smoothing filters to the outputs. 

Initial turn-on Q2 is done by Rl. Thereafter this task is 
performed by the feedback winding on T2 driving through R4 and 
C10. This winding initiates turn-on during the ring down following 
flyback. The operating frequency varies with line and load. 

IC3 compares the output voltage level at the base of Q3. When the 
voltage created by L4 and R15 combination is sufficient to turn on 
Q3, T3 terminates Q2's drive.. 

Q2 can also be turned off when sufficient voltage is developed 
across R12 causing Ql to turn on. 

SCRI is used as a crowbar designed to protect against output 
overvoltage . 



5-69 



3CCT 350429-1 
PCB HEADERS AMP 6CCT 35043,.-, 



I 
O 




Imatingplug-fan 

H20/220V LINK I 

NECTION I 



Figure 5-45 Power Supply Schematic 



CHAPTER 6 
TESTING AND TROUBLESHOOTING 



6.1 INTRODUCTION 

The VK100 terminal contains a complete set of hardware self-test 

programs that check all of the major terminal functions. The 

self-test indicates that a problem exists and where the problem 

is. 

Self-test mode has two tests power-up and diagnostic. Power-up 
tests automatically check the condition of the terminal every time 
terminal power is turned on. Diagnostic tests check the terminal 
outputs. Diagnostic tests require optional test connectors. 

The self-test functions of the VK100 are invoked in one of three 
ways : 

1. Automatic Tests (PUPTST) 

2. Escape Sequences (CSITST) 

3. SET-UP Mode (SETST) 

6.1.1 Automatic Tests (PUPTST) — The user has no control of 
the automatic confidence tests invoked when the terminal is 
powered on. The same tests may be invoked by doing a terminal 
reset (using SHIFT "-" key) . These tests may also be called as a 
group through the various methods listed below. 

6.1.2 Escape Sequences (CSITST) — All tests are invoked by the 
escape sequence: ESC [3; Pn; Pn; . . .y] where Pn selects the test to 
be performed as follows: 

Pn Test Selected 

1 All power-up tests 

2. External communication test 

3 Hardcopy communication test 

4. Display pattern test 

5. Color bar test 

6. Repeat selected tests until failure 

Any set of these tests may be selected in any order; however, they 
are always executed in numerical order. 



6-1 



The test select data is stored in a single byte (TSTSEL) , with one 
bit for each test/option selected. While the CPU, ROM and RAM 
tests are running, these select bits are stored in register E, 
preserving this register. 

6.1.3 SET-UP Mode (SETST) ~ When the terminal is in SET-UP 
mode, setting the ST mode to any number has exactly the same 
effect as specifying the same parameter in the above escape 
sequence. The selected tests are executed when ST0 is set. Thus 
typing ST190 selects all the power-up tests and repeats these 
tests until failure. Every time the ST parameter set routine 
(STPPST) is called, it accumulates the test select data (TSTSEL). 

6.1.4 Error Reporting — Errors occurring during any test are 
reported in one of two ways: 

1. Fatal errors 

2. Non-fatal errors 

6.1.4.1 Fatal Errors (TSTERROR) — A fatal error (which causes 
the terminal to be useless) displays an error code in the 
indicators with the LOCAL indicator, alternating with a possible 
data item with the Line indicator, each for about 1/2 second. 
Table 6-1 shows the possible error codes. 



Table 6-1 Possible Error Codes 




Error Codes Data 




Hard 
Basic Copy LI L2 
























1 








1 











1 


1 





1 









CPU Register Error Data=llll 

ROM Error Data=Bits 14,13,12 of 

ROM Address in Error 

RAM Error Data=Bit Number of RAM 

Error 

Video Bit Map Error Data=Bit Number of 

Screen RAM Error 

Vector Generator Data=llll 

Error 

CRT Controller Data=llll 
Register Error 



6-2 



6.1.4.2 Non-Fatal Errors — Errors which allow some portion of 
the terminal to be useful display an error code in the center of 
the screen. The following are the possible error codes. 

1. KB ERR — Keyboard error 

2. IC ERR — Internal communication test error 

3. EC ERR — External communication test error 

4. HC ERR — Hardcopy test error 

The two-byte mnemonic for the error is stored (TSTERM) and upon 
completion of terminal initialization is displayed in the center 
of the screen. The terminal always comes up in the local mode if 
any non-fatal errors are detected (only LOCAL indicator is lit) . 

6.2 POWER-UP SELF-TEST 

Power-up self-tests check the following terminal circuits. 

Microprocessor 

Visual and audible indicators 

Read only memory (ROM) 

Random access memory (RAM) 

CRT controller 

CRT timing 

Vector timing 

Video bit map 

Vector generator 

Keyboard 

Communications (internal) 

The power-up self-test can be started in four different ways. 

1. Turn the terminal power switch to the on position. 

2. Reset the terminal by pressing the shift and auxiliary 
keypad PF4 keys together in SET-UP mode. 

3. Select the set-up self-test feature (ST1) . 

4. Receive a command from the host computer. 

The power-up self-test takes about 15 seconds. While the test is 
running, the monitor displays various patterns that do not make 
sense. This is normal. Once the test is complete the cursor 
appears in the upper left corner of the monitor and only the 
ON-LINE indicator is turned on. If the self-test finds an error, 
it shows on either the keyboard or the monitor. 



6-3 



6.2.1 8085 CPU Test (CPUTST) 

The microprocessor test checks the following registers: A, B, C, 
D, E, H, L, and SP by writing two patterns in the registers. The 
two patterns are: 

1. 01010101 

2. 10101010 

The test is as follows: 

PATTERN »A»B»C>D»E»H»L»SP 

The pattern is loaded in the accumulator (A register) which is 
shifted to the B register ... shifted to the SP. 

Firmware clears H L and then does a double add with the SP. The H 
L registers end up with the following. 

H L 

01010101 01010101 

The firmware compares the contents of the H and L register with 
the contents of the A register. If either test finds a difference, 
an error code is generated. 

The error code = 0000 
The data code = 1111 

After the first pattern is checked, the second pattern is loaded 
and tested in the same manner. 

6.2.2 Visual and Audible Indicators 

The firmware when testing the indicators and bleeper circuits 
loads the accumulator with a value (0101010) . This turns on the 
ON-LINE, NO SCROLL, HARDCOPY. and L2 indicators and the bleeper for 
approximately 1/4 second (Figure 5-4) . 

6.2.3 ROM Test (ROM TST) 

The ROM test verifies the addressability, order and data of all 
the ROMs present in the VK100. Only the CPU (8085A) and the ROMs 
are used in this test. There are four ROMs that are tested. If 
there is an error, the indicators blink. 





Hard 






Basic 


copy 


LI 


L2 











1 



with code equal to 1= ROM failure 

with data equal to = address of ROM in error 



6-4 



To start the ROM test the following steps. 

1. Each ROM has a check byte stored somewhere in each ROM 
and is a function of the ROM address. 

2. Set initial value to high byte of ROM address + 1. 

3. Rotate current check value left one bit. 

4. Exclusive-OR current value with this ROM byte. 

5. If value is zero, ROM is correct. Any other value 
indicates an error. 

6.2.4 Program RAM Test (RAM TST) 

The program RAM checks to see if every bit can be written with 
ones and zeros and that every address is correct. This test uses 
only the 8085 CPU and the RAMs . The following patterns are written 
into the RAMs. 

11111111 
01010101 
10101010 
00000000 

The ROM firmware writes the all ones pattern into the RAM memory. 
To start the RAM test perform the following steps for each RAM 
byte. 

1. Read the first byte and compare with the old pattern (all 
ones). If the pattern is different, an error occurs. 

2. If no error is found, write new pattern into the first 
byte location and continue this sequence until done. 

3. If the error indicators blink with code = 0010, the data 
= the bit number of RAM bits in error. 

6.2.5 Video Bit Map RAM Test (VBMTST) 

This test checks the entire video bit map for read/write of and 
1. A simple vector pattern is written throughout the entire memory 
(including the attribute memory) and then read back. The test uses 
CPU, ROM, Program RAM and the vector generator. To start the video 
bit map RAM test perform the following algorithm: 

1. Set pattern = 01010101 () , blink = off, color = green 
blue. l 

2. Set vertical position to zero. 



6-5 



3. Do 256 times: 

a. Set horizontal position to zero. 

b. Write 128 dot vector horizontal to the right. Repeat 
six times. 

c. Increment vertical position by 2. 

4. For pattern = 10101010 ( ), blink = on, color = red; 
pattern = 00000000 ( ), blfnk - off, color = dark; perform 
the following. 

a. Set vertical position to zero. 

b. Do 256 times: 

1. Set horizontal position to zero. 

2. Do 64 times: 

a. Do 3 times 

Read 4 horizontal at current position 

Advance horizontal position by 4. 

Compare 4 bits just read with last pattern 
written. If pattern is different, an error is 
indicated. 

3. Read 4 attribute bits (blink, green, red, blue) 
at current position. 

4. Compare 4 bits just read with last pattern. If 
pattern is different an error is indicated. 

5. Decrement horizontal position by 12. 

6. Write a 12 dot vector to the right. 

c. Increment vertical position by 2. 

If error indicators blink with code = 0011, then the data = the 
bit number of data in error (bits — 11 are bit map bits, 13 — 16 
are attribute bits) . 

6.2.6 Vector Generator Test (VGNTST) 

The vector generator test writes a series of vectors from a single 
point and comparises a small portion of the resultant bit map with 
an expected result. This test uses the 8085, ROM, Program RAM, and 
video bit map RAM. 



6-6 



To start the vector generator test perform the following steps: 

1. Clear video bit map 

2. Write the following sequence of vectors (Figure 6-1) 
starting at (-1,0) 

3. Read and compare the 8 by 8 dot sample from (0,0), (7,0) 
to (0,7), (7, 7) with the following pattern: 

(0,0) 00100000 (7,0) 

00100000 

00100001 

10100000 

00100000 

00100000 

00100000 
(0,7) 00010000 (7,7) 

If pattern is not identical an error occurs. 

4. If an error occurs the indicators will blink the 
following patterns. 

Code=0101 
Data=llll 



Vector Generator Test (to write seouence of vector) 

Seouence of Vector Test (S) 

DU DVh DIR PHUL PAT WOPS 

74543210 76543210 76543210 3210 76543210 76543210 



00001000 
00001001 
00000111 

10 1 
00001001 
00000100 
00000001 

00001 100 



1111010 00001111 1111 10011100 01 

1111011 00001101 1110 10101000 01 

1111100 00001010 1101 11100000 01 
1111010 00001000 1100 11000000 01 

1111101 00001110 1011 11000000 01 
1111101 00001100 1010 11000000 01 

1111110 00001011 1001 10000000 01 

1111111 00001001 1000 00000000 01 



10 
10 1 
10 10 
10 11 
110 
110 1 
1110 

1111 



Figure 6-1 Vector Generator Sequence 



6-7 



6.2.7 CRT Controller Test (CRTST) 

This test makes sure that the CRT controller registers can be read 
and written. Only one register of the CRT controller, the cursor 
register, is read/write. This test uses the CPU and ROM. Two 
patterns are used in this test. 

01010101( 2 ) , 10101010( 2 ) 

1. Write the cursor low register (register 15) and compare 
it with the pattern. 

2. Read the cursor low register and compare with pattern. If 
the pattern is different or an error occurs. 

3. If an error occurs the indicators will blink the 
following patterns. 

Code=0101 
Data=llll 

6.2.8 CRT Timing 

Firmware routine checks for the V SYNC signal from the CRT 
controller. If V SYNC is not received within 20 ms , a CRT timing 
error is generated. 

Code 0100100 (Local and Hardcopy) 

Data 1001111 (On-Line, Basic, Hardcopy, LI, L2) 

6.3 DIAGNOSTIC TESTS 

These tests are not normally executed by the terminal. They can be 
initiated via setup or escape sequences. They exist for diagnostic 
purposes and for error isolation in repair operations. The VK100 
terminal contains five diagnostic tests. 

External communications test 

Hardcopy communications test 

Display test 

Color bar test 

Screen alignment pattern 

The following paragraphs describe Each test. 

6.3.1 External Communications Test 

This test is an extension of the internal communications test in 
the power-up test. In the external communications test the 
transmit and receive lines are connected through a special 
loopback connector. A predefined set of characters are then 
transmitted. The terminal receives the characters and compares 
them to the characters transmitted. If the characters do not match 
an error is indicated. This test is performed for all 
communications speeds. 

This test requires an optional loopback connector. 



6-8 



To start the external communications test perform the following 
steps : 

1. Turn terminal power off. 

2. Disconnect the communications cable from the rear of the 
terminal . 

3. Install the optional loopback connector on the terminal 
communications output connector. Loopback connector part 
number 12-13336-00 is for EIA communications; part number 
70-13503-00 is for 20 mA current loop communications. 

4. Turn terminal power on. 

5. Place the terminal in SET-UP mode. 

6. Verify CI SET-UP feature (CI0=EIA; CI1=20 mA) . 

7. Set the self-test SET-UP feature for selection 2 (ST2) . 

8. Exit SET-UP mode by pressing the SET-UP key. This starts 
the test. 

If no error is found by the test the cursor is displayed on the 
monitor. Paragraph 6.4 lists the displayed error codes and their 
meanings. 

6.3.2 Hardcopy Communications Test 

This test is similar to the external communications test described 
above. In the hardcopy communications test, the transmit and 
receive hardcopy output lines are connected through an EIA 
loopback connector. A predefined set of characters is then 
transmitted. The terminal receives the characters and compares 
them to the characters transmitted. If the characters do not match 
an error is indicated. 

This test requires an optional loopback connector. 

To start the hardcopy communications test perform the following 
steps: 

1. Turn terminal power off. 

2. Disconnect the hardcopy printer cable from the rear of 
the terminal. 

3. Install the optional loopback connector on the terminal 
hardcopy connector. The loopback connector is part number 
12-13336-00. 

4. Turn terminal power on. 

5. Place the terminal in SET-UP mode. 



6-9 



6. Set the self-test set-up feature for selection 3 (ST3) . 

7. Exit SET-UP mode by pressing the SET-UP key. This starts 
the test. 

If no error is found by the test the cursor is displayed on the 
monitor. Paragraph 6.4 lists the displayed error codes and their 
meanings. 

6.3.3 Display Test 

This test displays a full screen of blue, red, green, white, 
black, and a Crosshatch pattern. Each display screen lasts for 
approximately one-half second and the Crosshatch pattern remains 
on the screen at the end of the test. On a black and white monitor 
the test displays full screens of increasing intensity. 

To start the display test perform the following steps. 

1. Place the terminal in SET-UP mode. 

2. Set the self-test set-up feature for selection 4 (ST4) . 

3. Exit SET-UP mode by pressing the SET-UP key. This starts 
the test. 

An error in this test occurs if one of the display screens is not 
shown. If this happens the monitor attached to the VK100 terminal 
may have failed. Proceed with the color bar test. 

To clear the monitor screen reset the terminal by pressing the 
SHIFT and PF4/RESET keys together. 

6.3.4 Color Bar Test 

This test displays a color bar/grey scale pattern on the monitor. 
The color bar/grey scale pattern consists of eight equally spaced 
vertical bars. On a color monitor the bars are in the following 
order from left to right: 



Black 


Green 


Blue 


Cyan 


Red 


Yellow 


Magenta 


White 



On a monochrome (black and white) monitor the bars show as 
different shades of grey. The bars start as black on the left and 
increase in intensity to a white bar on the right of the display. 

To start the color bar test perform the following steps: 

1. Place the terminal in SET-UP mode. 

2. Set the self-test set-up feature for selection 5 (ST5) . 

3. Exit SET-UP mode by pressing the SET-UP key. This starts 
the test. 

6-10 



An error in this test occurs if the color bar/grey scale pattern 
is not displayed or a portion of the pattern is missing. Either 
error condition indicates that the attached monitor has failed, 
the video cable is not connected properly, or the VK100 terminal 
has failed. If you suspect that the terminal has failed, connect 
it to a different monitor and perform both the display and color 
bar/grey scale tests. If the same symptoms are present the second 
time the terminal has probably failed. 

To clear the monitor screen reset the terminal by pressing the 
SHIFT and PF4/RESET keys together. 

6.3.5 Screen Alignment Pattern 

This test fills the screen with a Crosshatch pattern. The 
Crosshatch pattern adjusts the display monitor connected to the 
VK100 terminal. 

To place the screen alignment pattern on the monitor screen 
perform the following steps: 

1. Place the terminal in SET-UP mode. 

2. Set the self-test set-up feature for selection 4 (ST4) . 

3. Exit SET-UP mode by pressing the SET-UP key. This starts 
the display test. At the end of the display test the 
screen alignment pattern remains on the screen. 

To clear the monitor screen reset the terminal by pressing the 
SHIFT and PF4/RESET keys together. 

6.4 ERROR CODES 

There are two categories of errors: fatal and nonfatal. Fatal 
errors cause the terminal to immediately stop all operations. The 
monitor screen displays random patterns that do not make sense. In 
addition to the random pattern an error code is displayed on the 
keyboard indicators. Table 6-2 shows the possible error codes. 

The fatal error code displayed on the keyboard light indicators 
contains two different messages: an error code and a data code. 
The error code lights the LOCAL indicator and displays a code in 
the BASIC, HARDCOPY, LI, and L2 indicators. The data code lights 
the ON-LINE indicator and is displayed in the BASIC, HARDCOPY, LI, 
and L2 indicators. The VK100 terminal alternates between each 
message about every one-quarter second. 



6-11 



Table 6-2 Possible Fatal Error Codes 



Error Code Displayed 

On No Hard L L 

Line Local Scroll Basic Copy 1 2 Meaning 























Microprocessor 
error 






X 





X 


X 


X 


X 


Data code 


X 

















X 


ROM error 





X 








? 


7 


7 


Data code 


X 














X 





RAM error 





X 








7 


7 


7 


Data code 


X 














X 


X 


CRT controller 
error 





X 





X 


X 


X 


X 


Data code 


X 











X 








CRT controller 
timeout 





X 





X 


X 


X 


X 


Data code 


X 











X 





X 


Vector timeout 
error 





X 





X 


X 


X 


X 


Data code 


X 



? 


= ON 

= OFF 

= variable 


condition 













6-12 



Nonfatal errors do not halt the terminal processor. Instead, the 
terminal displays an error code on the keyboard indicators and in 
the center of the monitor screen. The terminal may still be used 
if a nonfatal error occurs. In this case, the terminal remains in 
on-line or local mode with the appropriate indicator lit. The 
error is indicated by any of the BASIC, HARDCOPY, LI or L2 
indicators blinking. An example of this type of occurrence is a 
keyboard error. If the self-test detects a keyboard error, the L2 
indicator blinks, and the message KB ERR is shown on the monitor 
screen . 

Table 6-3 lists all of the nonfatal error codes the terminal 
displays and what they mean to the terminal. 



Table 6-3 Possible Nonfatal Error Codes 



Indicator Error Code 

No Hard L L Screen 

Scroll Basic Copy 1 2 Code Meaning 

B B ID Err Vector generator and 

internal 

communications data 
loopback error 

B B IT Err Vector generator and 

internal 

communications timeout 
error 

B B B KC Err Vector generator, 

keyboard and 
communications control 
signal error 

B B B KD Err Vector generator, 

keyboard and internal 
communications data 
loopback error 

B B B KT Err Vector generator, 

keyboard and internal 
communications timeout 
error 



= Indicator FF 

B = Indicator blinking 



6-13 



Table 6-3 Possible Nonfatal Error Codes (Cont) 
Indicator Error Code 



No 




Hard 


L 


L 


Screen 


Scroll 


Basic 


Co 


,py 


1 


2 


Code 





B 













None 





B 










B 


KB Err 





B 







B 





IC Err 



Meaning 



B 



B 



ID Err 



IT Err 



Video RAM error 

Video RAM and keyboard 
error 

Video RAM and internal 
communications control 
signal error 

Video RAM and internal 
communications data 
loopback error 

Video RAM and internal 
communications timeout 
error 



B 



B 



B 



B B KC Err Video RAM, keyboard 

and internal 
communications control 
signal error 

B B KD Err Video RAM, keyboard 

and internal 
communications data 
loopback error 

B B KT Err Video RAM, keyboard 

and internal 
communications timeout 
error 

None Video RAM and vector 

generator error 

B KB Err Video RAM, vector 

generator and keyboard 
error 



6-14 



Table 6-3 Possible Nonfatal Error Codes (Cont) 



Indicator Error Code 



No 
Scroll 



Basic 



Hard 
Copy 



L 

1 



L 
2 



Screen 
Code 



Meaning 







B 



B 



B 



B 



B 



IC Err Video RAM, vector 

generator and internal 
communications control 
signal error 

ID Err Video RAM, vector 

generator and internal 
communications data 
loopback error 

IT Err Video RAM, vector 

generator and internal 
communications timeout 
error 



B 



B 



B 



B B KC Err Video RAM, vector 

generator, keyboard 
and communications 
control signal error 

B B KD Err Video RAM, vector 

generator, keyboard 
and internal 
communications 
data loopback error 

B B KT Err Video RAM, vector 

generator, keyboard 
and internal 
communications timeout 
error 



= Indicator FF 

B = Indicator blinking 



6-15 



6.5 TROUBLESHOOTING 

The troubleshooting section consists of Tables 6-4 through 6-6. 
These tables show the indicators error code, screen code and the 
module to replace. 

Table 6-7 shows the on-site recommended spares and their part 
numbers . 

Table 6-8 lists the DIGITAL Servicenter Recommended Spares and 
their part numbers. 



Table 6-4 Fatal Error Codes 



Indicator 


El 


rror 


Code 


































Module 


On 






No 






Hard 


L 


L 




to 


Line 


Local 


So 


roll 


Basic 


Copy 


1 


2 


Meaning 


Replace 


X 
























Microprocessor 
error 


Logic 





X 









X 


X 


X 


X 


Data code 




X 





















X 


ROM error 


Logic 





X 












p 


7 


7 


Data code 




X 


















X 





RAM Error 


Logic 





X 












7 


7 


7 


Data code 





X X CRT controller Logic 
error 








X 





X 


X 


X 


X 


Data code 




X 













X 








CRT controller 
timeout 


Logic 







X 





X 


X 


X 


X 


Data code 




X 













X 





X 


Vector timeout 
error 


Log ic 







X 





X 


X 


X 


X 


Data code 




X 



7 


= 


ON 

OFF 

Variable 


con 


idition 













6-16 



Table 6-5 Nonfatal Error Codes 



Indicate 


or Error 


Code 
















No 




Hard 


L 


L 


Screen 


Module tc 


> 




Scroll 


Basic 


Copy 


1 


2 


Code 


Replace 


















B 


KB 


Err 


Keyboard 















B 





IC 


Err 


Logic 















B 





ID 


Err 


Logic 















B 





IT 


Err 


Logic 















B 





EC 


Err 


Logic 















B 





ED 


Err 


Logic 















B 





ET 


Err 


Logic 















B 





EM 


Err 


Logic 















B 





HC 


Err 


Logic 















B 





HD 


Err 


Logic 















B 





HT 


Err 


Logic 















B 


B 


KC 


Err 


Keyboard 


and 


Logic 











B 


B 


KD 


Err 


Keyboard 


and 


Logic 











B 


B 


KT 


Err 


Keyboard 


and 


Logic 








B 








None 


Logic 












B 





B 


KB 


Err 


Keyboard 


and 


Logic 








B 


B 





IC 


Err 


Logic 












B 


B 





ID 


Err 


Logic 












B 


B 





IT 


Err 


Logic 












B 


B 


B 


KC 


Err 


Keyboard 


and 


Logic 








B 


B 


B 


KD 


Err 


Keyboard 


and 


Logic 








B 


B 


B 


KT 


Err 


Keyboard 


and 


Logic 





B 











None 


Logic 









B 








B 


KB 


Err 


Keyboard 


and 


Logic 





B 





B 





IC 


Err 


Logic 









B 





B 





ID 


Err 


Logic 









B 





B 





IT 


Err 


Logic 









B 





B 


B 


KC 


Err 


Keyboard 


and 


Logic 





B 





B 


B 


KD 


Err 


Keyboard 


and 


Logic 





B 





B 


B 


KT 


Err 


Keyboard 


and 


Logic 





B 


B 








None 


Logic 









B 


B 





B 


KB 


Err 


Keyboard 


and 


Logic 





B 


B 


B 





IC 


Err 


Logic 









B 


B 


B 





ID 


Err 


Logic 









B 


B 


B 





IT 


Err 


Logic 









B 


B 


B 


B 


KC 


Err 


Keyboard 


and 


Logic 





B 


B 


B 


B 


KD 


Err 


Keyboard 


and 


Logic 





B 


B 


B 


B 


KT 


Err 


Keyboard 


and 


Logic 



= Indicator off 

B = Indicator blinking 



6-17 



Table 6-6 VK100 Troubleshooting 



Type of Corrective 

Problem Symptom Check Action 

Power No indicators, Line fuse Replace if 
no video on open, 

monitor, no Power cord Reconnect 
SET-UP key at both ends. 



response, no fan 

Replace power 
cord if open. 

Power supply Reconnect 
connections power supply. 
J2 and J3 

Replace power 

supply. 

No indicators, Check power If voltages 

no video on supply are wrong 

monitor, no voltages: replace power 

SET-UP key +12, +5, -12, supply, 

response. Fan (Fig. 6-1) If voltages 

is on. are ok: 

Replace 
keyboard . 

Replace logic 
board . 

No indicators, Replace 

no SET-UP key keyboard, 

response. Fan is Replace logic 

on and video module, 
present on 
monitor . 

No fan, SET-UP Fan is Clear 

key responds, obstructed. obstruction. 

Indicators are 

on and video Fan cable. Replace 

is present on power supply. 

monitor. 

Error code See Tables 

displayed in 6-4 and 6-5. 

indicator 
(self-test error) . 



6-18 



Table 6-6 VK100 Troubleshooting (Cont) 



Type of 
Problem 



Symptom 



Check 



Corrective 

Action 



Video with 
a color 
monitor . 



No cursor 
displayed . 



HP, HM, or VM 
SET-UP features 
are set wrong. 

Monitor 
brightness 



Monitor power 
on 

Have customer 
check monitor 
fuse . 



Change SET-UP 

feature 

settings. 

Increase 

monitor 

brightness. 

Turn monitor 
power on. 

Have customer 
replace 
monitor fuse. 



Run color bar 
and screen 
alignment 
self-tests. 



Replace 
logic board. 

Replace 
video cable. 



Wrong color 
displayed . 



Have customer 
swap monitor 
with another 
monitor . 



Check video 
connections. 



If problem 
is solved 
the monitor 
is bad. 
Monitor 
repair is the 
customer ' s 
responsibility. 

Reconnect 
video cable. 

Replace video 
cable. 



Incorrect data 
displayed or 
sync is lost. 



Have customer 
adjust monitor 

Replace video 
cable. 

Replace logic 
module . 



6-19 



Table 6-6 VK100 Troubleshooting (Cont) 



Type of 
Problem 



Symptom 



Check 



Corrective 
Action 



Monitor is bad. 



Monitor repair 
is the 
customer* s 
responsibility. 



Video with 
black and 
white 

(monochrome) 
monitor . 



No color is 
displayed. The 
monitor display 
is always white. 

No cursor 
displayed. 



HP, HM or VM 
SET-UP features 
are set wrong. 

Monitor 
brightness . 

Monitor power 
on . 

Have customer 
check monitor 

fuse . 

Run color bar 
and screen 
alignment 
self-test. 



Have customer 
swap monitor 
with another. 



Replace logic 
module . 



Change SET-UP 

feature 

settings. 

Increase 
monitor 
brightness . 

Turn monitor 
power on. 

Have customer 
replace 
monitor fuse. 

Replace 
video cable. 

Replace logic 
module . 

If problem 
is solved, 
the monitor 
is bad. 



Incorrect data 
is displayed or 
sync is lost. 



Monitor repair 
is the customer's 
responsibility. 

Replace 
video cable. 

Replace logic 
module . 



6-20 



Table 6-6 VK100 Troubleshooting (Cont) 



Type of Corrective 

Problem Symptom Check Action 



Monitor is bad. Monitor repair 

is the 
customer * s 
responsibility. 



Hardcopy No hardcopy Make sure all 

output (1 or VK100 and LA34VA 
more terminals) terminals are 

turned on. 



Make sure 
correct I/O 
cables are used 
and connected. 

Perform the Replace logic 
hardcopy self- module on 
test on all failing unit. 
VK100 terminals 
in the string. Replace 

hardcopy cable, 



Perform the The problem is 

LA34VA in the LA34VA. 
self-test . 

Wrong data is Check the Change the 

printed. SET-UP SET-UP 

parameters at parameters. 

VK100 and LA34VA 

terminals . 

Perform the Replace logic 

hardcopy module, 
self-test. 

The problem is 
in the LA34VA. 



6-21 



Table 6-6 VK100 Troubleshooting (Cont) 



Type of 
Problem 



Symptom 



Check 



Corrective 
Action 



Communica- 
tion 



VK100 does not 
communicate 
with the 
host system. 



Check the 
SET-UP 
parameter 
settings in the 
terminal and 
make sure that 
they agree with 
the host system, 

Perform the 
external com- 
munications 
self-tests . 



Change the 
SET-UP 
parameters , 



Replace logic 
module . 

Replace 

communications 
cable . 

The problem is 
in either the 
modem (if one 
is used) or the 
system. 



Table 6-7 On-Site Recommended Spares 



Qty Description 



Part Number 



1 Logic module 

1 Power supply assembly 

1 Keyboard assembly 

1 Y type cable 

1 Video cable, coaxial 

1 Loopback connector (EIA) 

1 Loopback connector (20 mA) 

1 Power cord (115 V) 

1 Power cord (230 V) 

1 Power cable (dc) 

10 Plunger, 5/16 dia. 

10 Grommet, snap-in, 5/16 dia 

4 Screw, sems, slotted head, 

1 Fuse, 2 A, 250 V box of 5 

4 Screw, sems, slotted head, 

1 Keycap removal tool 





54-14230-00 




70-17387-00 




70-17397-FS 




17-00197-00 




17-00223-00 




12-15336-00 




70-15503-00 




17-00083-09 




17-00083-10 




70-17389-00 




90-09964-00 




90-09966-01 


4-40 X 3/8 


90-09702-00 




90-07215-00 


10-32 X 3/8 


90-06444-00 




74-16355 



6-22 



Table 6-8 DIGITAL Servicenter Recommended Spares 



Qty Description 



Part Number 



1 Logic module 

1 Power supply assembly 

1 Power supply module (PCB only) 

1 Power cable (dc) 

1 Receptacle assembly (ac) 

1 Power cord (115 V) 

1 Power cord (230 V) 

1 Power switch, 2-pole, 16 A 

1 Fan assembly 

1 Fuseholder 

1 Keyboard assembly 

1 Keyboard distribution cable 

10 Indicator, ANCD § 10 mA 

10 Keyboard plunger 

10 Keyboard spring 

20 Keyboard contact, quadfurcated 

20 Keyboard contact 

1 Switch, array cap. solid adapter 

1 Fuse, reg. blow, 2 A 250 V (box of 5) 

2 Screw, Sems, slotted head, 10-32 X 3/8 
10 Support, C Bd . standoffs 

10 Screw, Sems, slotted head, 4-40 X 3/8 

10 Plunger, 5/16 dia. 

10 Grommet, snap-in, 5/16 dia. 

10 Screw, captive, hex slotted 

10 Bumper, round 

10 Bumper, square 

10 Fastener, pinch-on 

10 Screw, hex head, slotted, 6-32 X 5/16 

2 Case, bottom 

2 Case, top 

1 Y type cable 

1 Video cable, coax 

1 Loopback connector (EIA) 

1 Loopback connector (20 mA) 

2 Foam insert, top 

2 Foam insert, bottom 

2 Carton, die-cut 

2 Polybag 

2 Tape 



54-14230-00 
70-17387-00 
12-16987-00 
70-17389-00 
70-17411-00 
17-00083-09 
17-00083-10 
12-17051-00 
12-16488-00 
12-16931-00 
70-17397-FS 
70-17390-00 
11-10864-00 
12-11862-00 
12-11863-00 
12-11865-00 
12-11866-00 
12-14332-00 
90-07215-00 
90-06444-00 
90-09313-00 
90-06444-00 
90-09964-00 
90-09966-01 
12-16682-00 
90-09538-00 
90-09624-00 
90-09601-00 
90-09967-00 
70-17394-00 
70-17395-00 
17-00197-00 
17-00223-00 
12-15336-00 
70-15503-00 
99-06742-00 
99-06742-01 
99-06793-00 
99-05128-17 
99-06486-00 



6-23 



6.6 



ADJUSTMENTS 



The VK100 is not adjustable. All power supply and video outputs 
are constant. The appropriate module must be replaced if an output 
is low or not present. 

The video monitor _i_s adjustable. The monitor is provided by the 
customer and is the responsibility of the customer. Adjustments to 
the monitor must be made by the customer or a service technician 
who has been qualified by the monitor manufacturer. DIGITAL does 
not supply any monitor for use with the VK100 terminal. 

The best way to determine if the monitor requires adjustment is to 
swap the suspected bad monitor with one that is working correctly. 
If the problem disappears the monitor is bad. If the problem 
remains the VK100 terminal contains a problem. Use the procedures 
in Chapters 2 and 3 to test the terminal and locate the problem. 

6.7 REMOVAL AND REPLACEMENT 

To remove or replace a subassembly, the only tools necessary are: 

Common blade screwdriver or 
1/4 inch nutdriver 

Figure 6-2 lists all removal procedures in this chapter and the 
sequence in which they are performed. As an example, Figure 6-2 
shows that to remove the terminal logic board the top cover, 
keyboard assembly, and power supply assembly removal procedures 
must be performed first. 





TOP COVER 
(PARA 5.2) 






' 








KEYBOARD ASSY. 
(PARA 5.3| 






' 


1 






POWER SUPPLY 
ASSY 
(PARA 5.4) 


















' 






1 


' 


POWER SUPPLY 
REGULATOR BD 
(PARA 5.5) 




POWER SUPPLY 
FAN ASSY 
(PARA 5.6) 




TERMINAL 
LOGIC BOARD 
(PARA 5.7) 



Figure 6-2 Module Removal Sequence 



6-24 



6.7.1 Top Cover Removal 

To remove the top cover perform the following steps. 

1. Remove power from the terminal by disconnecting the ac 
plug. 

2. Turn the terminal over so that the bottom of the terminal 
is accessible. 

3. Loosen the four (4) captive screws at the corners of the 
terminal (Figure 6-3) . The screws may be loosened with 
either a nutdriver or a blade-type screwdriver. 

4. Grasp the top and bottom halves of the terminal and turn 
the terminal over so that the keyboard is face up. 

5. Grasp the top cover by its sides and lift the cover up 
and off the terminal. 

6. Install the top cover by performing steps 1 through 5 in 
reverse . 



CAPTIVE SCREWS 




Figure 6-3 VK100 Terminal (Bottom View) 



6-25 



6.7.2 Keyboard Assembly Removal 

To remove the keyboard assembly perform the following steps. 

1. Remove the terminal top cover (Paragraph 6.7.1). 

2. Release the four (4) pop fasteners securing the keyboard 
assembly to the terminal (Figure 6-4) . To release the pop 
fasteners pull up on the plungers. 

3. Gently remove the keyboard assembly from the terminal and 
place it in front of the terminal. 

4. Disconnect the keyboard ribbon cable from the logic 
board . 



5. 
6. 



CAUTION 
Do not disconnect the keyboard ribbon 
cable from the keyboard. Any attempts to 
do so will damage the connector and 
force replacement of the entire keyboard 
assembly. 

Remove the keyboard assembly. 

Install the keyboard assembly by performing steps 1 
through 5 in reverse. 




KEYBOARD 

CABLE 



DO NOT | POP FASTENERS 

REMOVE THIS | (4) 

CONNECTOR LOGIC BOARD 

KEYBOARD CABLE 

CONNECTOR 



Figure 6-4 Keyboard Assembly Removal 



6-26 



6.7.3 Power Supply Assembly Removal 

To remove the power supply assembly perform the following steps. 

1. Remove the terminal top cover (Paragraph 6.7.1). 

2. Remove the keyboard assembly (Paragraph 6.7.2). 

3. From the rear of the terminal, remove the grounding screw 
securing the connector bracket to the power supply 
chassis (Figure 6-5) . The screw may be removed with 
either a nutdriver or a blade-type screwdriver. 

4. Release the four (4) pop fasteners securing the power 
supply assembly to the terminal (Figure 6-6) . To release 
the pop fasteners pull up on the plungers. 



GROUND SCREW 




Figure 6-5 VK100 Terminal (Rear View) 



POP FASTENERS (4) 



POWER SUPPLY 
ASSY 



TERMINAL 
LOGIC BOARD 



J9 

(NOT SHOWN) 




Figure 6-6 Power Supply Assembly Removal 



6-27 



5. Gently remove the power supply assembly from the terminal 
and place it next to the rear edge of the terminal. 

6. Disconnect the 6-wire power output cable from J9 on the 
terminal logic board. 

7. Remove the power supply assembly. 

NOTE 
P14 connects to J14 for 115 V operation, 
or P14 connects to J13 for 230 V 
operation. 

8. Install the power supply assembly by performing steps 1 
through 6 in reverse. 

6.7.4 Power Supply Regulator Board Removal 

To remove the power supply regulator perform the following steps. 

1. Remove the terminal top cover (Paragraph 6.7.1). 

2. Remove the keyboard assembly (Paragraph 6.7.2) . 

3. Remove the power supply assembly (Paragraph 6.7.3). 

4. Disconnect the 3-wire connector from Jll on the regulator 
board . 

5. Disconnect the 6-wire connector from J14 (115 V) or J13 

(230 V) on the regulator board. 

6. Remove the power output cable from J10 on the regulator 
board . 

7. Remove the four (4) screws securing the regulator board 
to the power supply chassis. Remove the regulator board. 
The screws may be removed with either a nutdriver or a 
blade-type screwdriver. 

8. Install the power supply assembly by performing steps 1 
through 6 in reverse. 



6-28 



6.7.5 Power Supply Fan Assembly Removal 

To remove the power supply assembly perform the following steps. 

1. Remove the terminal top cover (Paragraph 6.7.1). 

2. Remove the keyboard assembly (Paragraph 6.7.2). 

3. Remove the power supply assembly (Paragraph 6.7.3). 

4. Disconnect the 6-wire connector from J14 (115 V) or J13 
(230 V) on the power supply regulator board. 

5. Remove the two (2) screws securing the fan assembly to 
the power supply chassis (Figure 6-7) . The screws may be 
removed with either a nutdriver or a blade-type 
screwdriver . 

6. Install the power supply assembly by performing steps 1 
through 4 in reverse. 




POWER SUPPLY CHASSIS 
(REGULATOR BOARD REMOVED) 



Figure 6-7 Power Supply Fan Assembly Removal 



6-29 



6.7.6 Terminal Logic Board Removal 

Perform the following steps to remove the terminal logic board. 

1. Remove the terminal top cover (Paragraph 6.7.1). 

2. Remove the keyboard assembly (Paragraph 6.7.2). 

3. Remove the power supply assembly (Paragraph 6.7.3). 

4. Release the four (4) pop fasteners securing the logic 
board to the bottom cover (Figure 6-8) . To release the 
pop fasteners pull up on the plungers. 

5. Remove the terminal logic board. 

6. Install the terminal logic board by performing steps 1 
through 5 in reverse. 

7. Be sure to set the default SET-UP switches to the 
customer settings. 



POP 
FASTENERS (4) 




TERMINAL 

LOGIC 

BOARD 



Figure 6-8 Terminal Logic Board Removal 



6-30 



APPENDIX A 
VK100 TERMINAL SPECIFICATIONS 



VK100 TERMINAL SPECIFICATIONS 
Dimensions 

Height 

Width 

Depth 

Weight 

Shipping weight 

Environment 

Operating 

Temperature 
Relative humidity 
Max wet bulb 
Min dew point 
Altitude 

Nonoperating 

Temperature 
Relative humidity 
Altitude 



9.88 cm (3.89 in) 
49.30 cm (19.40 in) 
31.10 cm (12.25 in) 



5.7 kg (12.5 lbs) 



10' to 40' C (50' to 104' F) 

10% to 90% 

28' (82* F) 

2' C (36' F) 

2.4 km (8,000 ft) 



-40' to 66' C (-40' to 151' F) 

5% to 95% 

9.1 km (30,000 ft) 



Power 



Line voltage 



Line frequency 
Current 



90 — 128 V RMS single phase, 
2 wire with ground wire 
180 — 256 V RMS single phase, 
2 wire with ground wire 
(internally selectable) 

46 Hz to 61 Hz 

1.3 Arms max at 115 Vrms 
0. 7 Arms max at 230 V 



A-l 



Power 

Input power 
Current limiting 
Power cord 
Product Safety 



Program Memory 



Display Outputs 
Text mode 

Character 
Character set 

Text cursor type 
Graphics mode 

Graphic cursor type 

Locator cursor type 



120 VA apparent, 60 W max 

2 A/250 V normal blow fuse 

2.0m (6.5 ft) , 3 prong 

UL: Listing per UL 478 
CSA: certification per CSA 
C22.2. No. 154 
IEC 435 and VDE 0804 
compl iance 

13K bytes available to the user 

and down-line loadable: 

7.8K for BASIC programs 

2+K for ReGIS macrographs and 

keypad key definitions 

three soft character sets each 

95 X 10 X 8 bytes 



24 lines X 84 characters max 
or 24 lines X 42 double-width 
characters 

8 X 10 dot matrix with 
descenders 

95-character displayable ASCII 
subset (upper and lowercase, 
numeric and punctuation) 

Blinking block character; can be 
disabled in SET-UP 

768 pixels horizontal 
240 pixels vertical 

Diamond shape with cross hair in 
the center; can be disabled in 
SET-UP 

Large cross hair 



A- 2 



Graphic pattern memories 



Visual attributes 



Video outputs 



Keyboard 

General 
Key layout 

Auxiliary keyboard 
Visual indicators 



Permanent UK/US ASCII character 
set: 128 characters, 8 X 10 dot 
matrix 

Three user programmable and 
down-line loadable soft alphabet 
character sets: 95 characters 
each, 8 X 10 dot matrix 

Four bits per segment of 12 

horizontal pixels 

Eight levels of grey for black 

and white monitors 

Eight colors for color monitor: 

black, blue, red, magenta, 

green, cyan, yellow, and white 

Blink 

Output to drive one black and 
white (composite video) and one 
color (RGB) monitor (with 
composite green video) 
simultaneously 

Adjustable horizontal and 
vertical margins to accommodate 
monitor overscan 

Adjustable horizontal centering 
50/60 Hz refresh, noninterlaced 
or interlaced 



83-key unit 

65-key arrangement and 
sculpturing similar to standard 
typewriter keyboard, with an 
18-key auxiliary keypad 

18-key numeric pad with period, 
comma, minus, ENTER, and four 
function keys 

Seven indicators: five 
indicators dedicated to ON-LINE, 
LOCAL, NO SCROLL, BASIC and 
HARD COPY; two indicators user- 
programmable 



A- 3 



Keyboard 



Audible signals 



Communication 

Type 

Speeds 



Code 

Character format 

Character size 

Parity 

Synchronization 

Modes 
Hardcopy Interface 



Keyclock: sound simulates 

typewriter 

Bell: sounds upon receipt of 

BEL code, or 

sounds nine characters from 

right margin (keyboard 

selectable) 



EIA RS-232-C/CCITT V 24 or 20 
mA passive current loop 
(keyboard selectable) 

Full-duplex: 110 (two stop 
bits), 300, 600, 1,200, 2,400 
4,800, 9,600 and 19,200 baud; 
transmit and receive speeds are 
independent of each other 

ASCII 

Asynchronous serial 

Eight bits including parity bit 

Even, odd, or none (keyboard 
selectable) 

Keyboard selectable via 
automatic generation of XON/XOFF 
control codes 

Normal line, single character, 
local echo (keyboard selectable) 

Drive an LA34VA graphics printer 
with daisy-chaining capability 

Auto hardcopy 



A- 4 



APPENDIX B 
CALCULATIONS 



CALCULATION #1 

Error Register = 2 

DVM Register = 374 (l's complement of 3) 

Carry In = 1 

Error Register = 377 R 

No Carry Decrement 
Strobe Major and Minor Axis 



Error Register = 377 
DU Register = 005 



Error Register = 004 

Carry 
Strobe 



Direction — Decrement X and Y 
Do a Pixel Write 
Decrement Down Counter 

5-1 = 4 
Downcounter = 4 

RULES AND DRAW VECTOR 



1. Do not write in direction if 
2 from an odd line or 

6 from an even line. 

2. Do not write if the direction is 
5 or 1 , the scan line is even 

(Y0) and the last direction was 6. 

3. Do not write if the direction is 
1 or 3, the scan line is odd and 
the last direction was 2. 







II 
























J; 














T " 
IDEA 


I. 








VECTOR 1 





















B-l 



CALCULATION #2 

Error Register = 004 ft 

DVM Register = 374° 

Carry In = 1 

Error Register = 001 

Carry 



Strobe » Set Carry 



FF 



Error Register = 001 
DU Register = 005 

006 

Error Register = 001 



8 



Strobe 



Decrement 
Major Axis 



(No Error CLK) 



Direction — Decrement X 
Do a Pixel Write 
Decrement Down Counter 
4-1 = 3 

DRAW VECTOR 





















rD 


RE 


m 














N 








_| 




ID 
VE 


EA1 
CTC 


5S> 








' s 






























MA 


9757 



B-2 



CALCULATION #3 
Error Register = 1 
DVM Register = 374 

Carry In = 1 

Error Register = 376 

No Carry Decrement 
Strobe Major and Minor Axis 

Error Register = 376 
DU Register = 005 
Error Register = 003 

Carry 
Strobe 

Direction — Decrement X and Y. 
Do a Pixel Write 
Decrement Down Counter 
3-1 = 2 

DRAW VECTOR 



EVEN 
















ODD 








RE 


CTI 


3N 


3 - 


EVEN 








ODD 




*•« 












EVEN 


IDEA 


L l 


\ 








ODD 














EVEN 








P (200,200) 



B-3 



CALCULATION #4 
Error Register = 003 
DVM Register = 374 

Carry In = 1 

Error Register = 000 

Carry 
Strobe 

Error Register = 000 
DU Register = 005 

005 
Error Register = 000 

Strobe 

Direction — Decrement X 
Do a Pixel Write 
Decrement Down Counter 
2-1 = 1 

DRAW VECTOR 



Decrement 
Major Axis 



ODD Y=1 

EVEN Y=0 

ODD Y=>1 

EVEN Y=0 

ODD Y-1 

EVEN Y=0 











I | 








RE 


I i 
















N 












VECT 


OR 


s, 
> 


























P(200,200) 



B-4 



CALCULATION #5 
Error Register = 000 
DVM Register = 374 
Carry In = 001 
Error Register = 375 

No Carry Decrement 
Strobe Major and Minor Axis 

Error Register = 375 
DU Register = 005 
Error Register = 002 

Carry 
Strobe 

Direction — Decrement X and Y 
Do a Pixel Write 
Decrement Down Counter 
1-1 = 

DRAW VECTOR 
VECTOR COMPLETE 



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1 


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3' 


ODD 






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B-5 



EK-VK100-IP-001 



Illustrated 

Parts 

Breakdown 



VK100 

GIGI TERMINAL 



HOW TO USE THE IPB 

GENERAL 

This IPB is compiled following the organization and nomenclature 
of the engineering drawing structure. 

MAJOR ASSEMBLY LOCATOR 

The Major Assembly Locator (first illustration) is an index that 
provides a description and a figure reference for all illustrations used 
in this manual. 

INDENTED PARTS LIST 

This manual identifies each assembly being broken down (figure 
reference callout), and all parts of that assembly Further 
breakdown of an assembly is shown by an asterisk (*) preceding the 
item callouts in the Description Column. The number of asterisks 
preceding an item is used to denote the subordination of that item 
with respect to the Major Assembly A single asterisk preceding an 
item description indicates that the item is part of the major 
assembly being illustrated. Items that are subordinate to single 
asterisks items, are denoted by two asterisks (**) and immediately 
follow the related single asterisk item. Additional asterisks are used, 
as required, to denote further subordination. This system of part 
identification, provides a means for the user to identify the next 
higher assembly item and make alternate selections for parts when 
the required replacement part or assembly is not immediately 
available. 

COLUMN CALLOUT DESCRIPTION 

Figure & Item — Indicates the figure number and item number of 

each part. 

Description — Lists the name of the part and pertinent 
specifications (when required). Asterisks preceding the description 
denote the subordination of the part to the next higher assembly. 

DEC Part No. — Lists the DEC part ordering number. A blank in 
this column indicates a DEC part number was not assigned at the 
time of publication. 



ECO Cut-In — The notation at the top of this column indicates the 
ECO level of the system (option), at which the IPB was initially 
prepared. Subsequent ECO level designations, that modify existing 
parts or add new parts to the device, are inserted in the ECO Cut-In 
column next to the part that is added or modified. A bracket ([) 
preceding the item description is used to indicate the parts affected 
by ECO's. 

Vendor Code/Part No. — Indicates vendor parts that are not stocked 
by DEC. Refer to the Field Service Spares Catalog (vendor part 
number to DEC part numberl for the vendor code cross-reference. 

Used On Code — Letters in this column correspond to the variation 
codes assigned in Figure 1. Parts with an Alpha notation(s) are used 
only in those option variations. A blank indicates that the part is 
used on all option variations. 

Ref Fig No. — A cross reference between illustrations. For each 
Major Assembly, the number in this column denotes the figure of 
the next higher assembly. For all subassemblies, the number in this 
column denotes the figure showing additional detailed breakdown. 

SYMBOL USAGE 

Hardware Designators — Alpha designators for screws (S), washers 

(W), nuts (N), and retaining rings (Rl are inserted after the item 

number callouts on the illustration when stacked item numbers are 

used. 

Attaching Hardware — The (3 symbol is inserted before any part 
that is used as attaching hardware Attaching hardware is denoted as 
those parts that are not an integral part of the referenced assembly. 

(NFR) Not Field Repairable - The (NFR) symbol is inserted after 
any assembly that is not to be field dismantled. 

Other Symbols — Any other symbols that are required for kits, 
accessories, etc., will be explained and appear as part of the item 
description. 



REVISION HISTORY 



PRINTING 



ECO LEVEL 



DATE 



PAGES AFFECTED 



OTHER IPB MANUALS REQUIRED 
TO SUPPORT THIS OPTION 



1st Printing 



VK100 

70-17387 

70-17397 

70-17484 

54-14228 

70-17388 

70-17389 

70-17411 



00000-00000 
00000-00000 
00000-00000 
00000-00000 
00000-00000 
00000-00000 
00000-00000 
00000-00000 



9-29-81 



N/A 



N/A 



Copyright * 1981 by Digital Equipment Corporation. All- rights reserved. 

DM' reserves the right, without notice, to make substitutions anil 
modifications in the specifications of products documented in this 
manual and further reserves the right to withdraw any of these 
products from Ihe market without notice. 



DI.C is not responsible for errors which may appear in the technical 
description (including illustrations and photographs) of the products 
covered by this manual. 

None of the descriptions contained in this manual imply the 
granting of any license whatsoever to make, use or sell equipment 
constructed in accordance therewith. 



Printed in U S A 



EBSQQSO 

PARTS LIST 




VK100-01 



Figure 1. VK100 GIGI Terminal 



IPB-VK100 



FIG. 

& 

ITEM 

NO. 



DESCRIPTION 



DEC 
PART NO. 



ECO 
CUT-IN 
VK100 

00000 



USED ON 
CODE 



REF 
FIG 
NO. 



1- 



1 
2 
3 
4 
5 
6 
7 
8 

9 
10 
11 



VK100GIGI TERMINAL 

Code A - Used on Model VK100-AA 1 15V 
Code B - Used on Model VK100-AB 230V 

'KEYBOARD BASE ASSEMBLY 
"Enclosure, Bottom Keyboard 
**Bumper, Square (Adhesive Backed) 
"Bumper, Self Stick 
"Screw, Slotted Hex Hd No. 6-32 x 3/4 
'VK100 Logic Board 
'KEYBOARD/KEYCAP ASSEMBLY 
'POWER SUPPLY ASSEMBLY 1 15V 
*POWER SUPPLY ASSEMBLY 230V 
'Screw, Slotted Hex Hd No. 6-32 x 5/16 
'Keyboard Top Assembly 
'Power Cord 115V 
'Power Cord 230V 

Labels (Not Shown) 
'Label, "Electrical Data" Rear Panel 
'Label, "Electrical Data" 
'Label, "FCC Class A Processor" 



VK100-AA 
VK100-AB 

70-17394-00 
74-23626-00 
90-09624-00 
90-09538-00 
12-16682-00 
54-14230-00 
70-17397-00 
70-17387-00 
70-17387-01 
90-09967-00 
7a 17409-00 
17-00083-09 
17-00083-10 



36-17318-00 
36-13209-00 
36-17880-02 



A 

B 



A 

B 



A 
B 



IPB-VK100 



PARTS LIST 




VK1 00-02 



Figure 2. Po wer Supply A ssembly 



IPB-VK100 



FIG. 

& 

ITEM 

NO. 



DESCRIPTION 



DEC 
PART NO. 



ECO 

CUT-IN 

70-17387 

00000 



USED ON 
CODE 



REF 
FIG 
NO. 



2- 



1 

2 

3 

4 

5 

6 

7 

8 

9 

10 

11 

12 

13 

14 

15 

16 

17 



POWER SUPPLY ASSEMBLY 1 15V 
POWER SUPPLY ASSEMBLY 230V 

*Power Supply Chassis Assembly 

*Power Supply, Switching 

"Fan Assembly 1 15/230V 50-60 HZ 

"Screw, Slotted Hex Hd No. 10-32 x 3/8 

"Fuseholder, (F1) 12A250V 

"Tubing, Shrink 

*Fuse, 2A 250V 

*A.C. RECEPTACLE ASSEMBLY 

*Screw, Slotted Pan Hd No. 4-40 x 3/8 

"Switch Rocker (2 Position) 

"A.C. WIRING HARNESS ASSEMBLY 

"Screw, Slotted Hex Hd No. 6-32 x 5/16 

"Plunger 

"Grommet, Snap- In 

"Cable Tie (Bundle) 

"Nut, Kep No. 10-32 

"D.C. POWER CABLE ASSEMBLY 

Decals/Labels (Not Shown) 
"Label, "Danger Stored High Voltage" 
"Label, "2 A 250V" 
"Label, "Power Supply" 
"Decal, "Ground" 



70-17387-00 
70-17387-01 

70-17483-00 
12-16987-00 
12-16488-01 
90-06444-00 
12-16391-00 
91-07685-00 
90-07215-00 
70-17411-00 
90-09702-00 
12-17051-00 
70-17388-00 
90-09967-00 
90-09964-00 
90-09966-01 
90-07031-00 
90-06565-01 
70-1 7389- 0J 



36-16930-00 
36-17165-00 
90-09255-00 
36-12680-00 



A 
B 



IPB-VK100 



FIG. 




A 


ECO 






& 






CUT-IN 




REF 


ITEM 




DEC 


70-17397 


USED ON 


FIG 


NO. 


DESCRIPTION 


PART NO. 


00000 


CODE 


NO. 


3- 


KEYBOARD/KEYCAP ASSEMBLY 


70-17397-00 






1 


1 


*VK100 KEYBOARD/KEYCAP ASSEMBLY 


70-17484-00 






4 


2 


*Bracket, Key Array Support (R.H.) 


74-23702-00 








3 


*Bracket, Key Array Support (L.H.) 


74-23702-01 








4 


*Plunger 


90-09964-00 








5 


*Grommet, Snap- In 


90-09966-01 








6 


*Screw, Slotted Hex Hd No. 6-32 x 5/16 


90-09967-00 










VK1 00-03 



Figure 3. Keyboard/Keycap Assembly 



5/6 



IPB-VK100 



FIG. 




A 


ECO 






& 






CUT-IN 




REF 


ITEM 




DEC 


70-17484 


USED ON 


FIG 


NO. 


DESCRIPTION 


PART NO. 


00000 


CODE 


NO. 


4- 


VK100 KEYBOARD/KEYCAP ASSEMBLY 


70-17484-00 






3 


1 


*VK100 KEYBOARD MODULE ASSEMBLY 


54-14228-00 






5 


2 


'Adapter, Keycap 


12-14332-00 








3 


* Keycap Set (Basic Set) 


12-14333-72 








4 


*Keycap Set (Basic Numeric Pad) 


12- 14333- LA 








5 


'SPACE BAR ASSEMBLY 


70-15050-00 








6 


**Bar, Space 


12-11857-02 








7 


**Bracket, Space Bar 


74-24159-00 








8 


**Bar, Equalizer 


12-11858-00 








9 


**Switch, Keyboard Cap Tilted 


12-11860-00 








10 


*Clip, Space Bar Equalizer 


74-24160-00 










VK1 00-04 



Figure 4. VK100 Keyboard/Keycap Assembly 



7/8 



IPB-VK100 



FIG. 




A 


ECO 






& 






CUT-IN 




REF 


ITEM 




DEC 


54-14228 


USED ON 


FIG 


NO. 


DESCRIPTION 


PART NO. 


00000 


CODE 


NO. 


5- 


VK100 KEYBOARD MODULE ASSEMBLY 


54-14228-00 






4 


1 


*Board, Etch (Rev. C) 


50-14227-00 








2 


* Keyboard Array Assembly 


70-13910-00 








3 


*18 Key Numeric Pad Assembly 


70-14561-00 








4 


*Screw, Phi Pan Hd No. 4-24 x 3/8 


90-10033-00 








5 


*LED2MCD 10MA 


11-10864-00 








6 


*Keyboard Distribution Cable Assembly 


70-17390-OJ 










VK1 00-05 



Figure 5. VK 100 Keyboard Module Assembly 



9/10 



IPB-VK100 



FIG. 




A 


ECO 






& 
ITEM 




DEC 


CUT-IN 
70-17388 


USED ON 


REF 
FIG 


NO. 


DESCRIPTION 


PART NO. 


00000 


CODE 


NO. 


6- 


A.C. WIRING HARNESS ASSEMBLY 


70-17388-00 






2 


1 


*Connector (P11), Universal (Socket Housing) 3-Pin 
Mate-N-Lok 


12-12167-00 








2 


Terminal (P11), Universal Socket Contact 


12-12169-01 








3 


"Terminal (P1 1), Universal Ground Socket Contact 


12-17519-00 








4 


"Terminal, Quick Connect 


12-17000-00 








5 


"Terminal, Ring 


90-07930-00 








6 


"Cable Tie (Bundle) 


90-07031-00 








7 


"Label, "Cable Identification" 

"Wire, Strand, 18 AWG (Brown) 

"Wire, Strand, 18 AWG (Blue) 

"Wire, Strand, 18 AWG (Green/Yellow) 


90-09532-00 

91-07786-11 
91-07786-66 
91-07410-54 











VK1 00-06 



Figure 6. A.C. Wiring Harness Assembly 



11/12 



IPB-VK100 



FIG. 

& 

ITEM 

NO. 


DESCRIPTION 


A 

DEC 
PART NO. 


ECO 
CUT-IN 
70-17389 
00000 


USED ON 
CODE 


REF 
FIG 
NO. 


7- 


D.C. POWER CABLE ASSEMBLY 


70-17389-00 






2 


1 
2 
3 
4 


*Connector (P9, P10), Socket Housing 6 Pin Mate-N-Lok 

'Terminal (P9, P10), Socket Contact 

*CableTie (Bundle) 

*Label, "Cable Identification" 

*Wire, Strand, 18 AWG (Red) 
*Wire, Strand, 18 AWG (Orange) 
*Wire, Strand, 18 AWG (Blue) 
*Wire, Strand, 18 AWG (Black) 


12-10821-06 
12-09379-00 
90-07031-00 
90-09532-00 

91-07786-22 
91-07786-33 
91-07786-66 
91-07786-00 











VK100-07 



Figure 7. D.C. Power Cable Assembly 



13/14 



IPB-VK100 



FIG. 

& 

ITEM 

NO. 


DESCRIPTION 


A 

DEC 
PART NO. 


ECO 
CUT-IN 
70-17411 

00000 


USED ON 
CODE 


REF 
FIG 
NO. 


8- 


A.C. RECEPTACLE ASSEMBLY 


70-17411-00 






2 


1 
2 
3 
4 
5 
6 


*Connector (J12), 3 Pin Power Plug 

'Terminal, Ring 

'Terminal, Quick Connect 

'Terminal, Spade 

'Cable Tie (Bundle) 

'Label, "Cable Identification" 

'Wire, Strand 18 AWG (Green/Yellow) 
'Wire, Strand 18 AWG (Blue) 
'Wire, Strand 18 AWG (Brown) 


12-17046-00 
90-07930-00 
12-17000-00 
12-17045-00 
90-07031-00 
90-09532-00 

91-07410-54 
91-07786-66 
91-07786-11 








DEC 



/ 



tf 



LL 




\ 




VK100-08 



Figure 8. A.C. Receptacle Assembly 



15/16 



IPB-VK100 



ILLUSTRATED PARTS BREAKDOWN 
COMMENT SHEET 

Any and all comments and suggestions for correcting errors and/or additional information to improve this manual 
will be reviewed and researched for possible use when this manual is revised and/or reprinted. Enter your comments 
and suggestions in the form provided below and return to Technical Documentation. 



MODEL 



VK100GIGI TERMINAL 



PUBLICATION NO. EK-VK100-IP-001 



FIGURE NO. 



CHANGE FROM. 
CHANGE TO 



ITEM NO. 



FIGURE NO. 



CHANGE FROM. 
CHANGE TO 



ITEM NO. 



FIGURE NO.. 



CHANGE FROM. 
CHANGE TO 



ITEM NO. 



FIGURE NO.. 



CHANGE FROM. 
CHANGE TO 



ITEM NO. 



FIGURE NO. 



CHANGE FROM 
CHANGE TO 



ITEM NO. 



FIGURE NO. 



ITEM NO. 



CHANGE FROM 
CHANGE TO 



ADDITIONAL COMMENT(S) 



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